High-precision low-noise filter circuit design

TI Precision Designs are analog solutions created by TI's analog product experts. Validated designs provide theoretical analysis, component selection, complete printed circuit boards (PCBs), and tested performance of working circuits. Circuit modifications to meet alternative design goals are also discussed. This circuit is designed to amplify low-frequency noise (0.1Hz to 10Hz) to a level that can be easily measured with an oscilloscope. It uses a 0.1Hz second-order high-pass filter and a 10Hz fourth-order low-pass filter to achieve this function. 0.1Hz to 10Hz noise measurements are a common key parameter found in amplifier data sheets. This design is used to simplify noise measurements from 0.1Hz to 10Hz and is commonly used in operational amplifiers of different package types.

Design Summary The requirements for this design are as follows: Supply voltage: +/-15V DC, or +/-2.5V DC. Input: Noise (nV), with the amplifier determining the exact amplitude Output: Noise (mV), large enough to be read on an oscilloscope. Total Gain: 100dB, 100,000V/V, Filter Gain: 40dB, 100V/V. Design goals and performance are summarized in Table 1. The figure shows the response of the filter tested for this designed circuit.

How it works: The purpose of this circuit is to amplify low-frequency noise to a level that can be measured by a typical oscilloscope. This measurement is a common key parameter found in amplifier data sheets. The standard bandwidth used in these measurements is 0.1Hz to 10Hz. Many high-precision amplifiers probably have total noise referenced to an input noise on the order of 100nVpp. The gain of this circuit will be designed so that the signal output to the oscilloscope input is 10mVpp or greater. Please note that many oscilloscopes can achieve a display accuracy of 1mV/div when connected directly with a BNC connector. The device under test (DUT) is operating at high gain, where it is the dominant noise source, while the noise within the cascade filter circuit is not very noticeable. The purpose of this cascade filter is to have low noise, accurate filter cutoff frequency, and accurate gain. Low-frequency noise specifications are always referenced to the DUT's equivalent input noise. The noise measured by the oscilloscope is 10mVpp. RTI noise is calculated by dividing the output noise by the total gain. In this example, the total gain is 100,000 (10 x 1,000), so dividing the output noise by the total gain gives us the RTI noise (Vn-RTI = 10mV / 100,000 = 100nVpp).

A more complete schematic of this design circuit is shown in . The first level is the device under test (DUT). This device is equipped with slots for easy testing of different packaged devices. Three cascade circuits following the DUT form a 0.1Hz (second order) to 10Hz (fourth order) bandpass filter. The purpose is to amplify the low frequency voltage noise on the OPA827 to a level that can be easily read by an oscilloscope. Bandwidth selection from 0.1Hz to 10Hz is an industry standard.

The purpose of the first stage-DUT circuit is to measure the low-frequency noise of the operational amplifier. The first stage is the op amp we wish to test and is called the device under test (DUT). As shown, the DUT is a high-gain (1000x) circuit to ensure that its noise is the main noise source of the entire circuit, and the subsequent op amp circuit noise can be ignored. The parallel resistor combination that sets the gain is chosen to minimize resistor thermal noise (Req = 100kΩ || 100Ω = 99.9Ω). Shows the relationship between resistance and thermal noise. In this circuit, the noise generated by the equivalent resistance Req = 99.9Ω is approximately 1.1nV.

The second stage is a high-pass filter with a gain of 10. Texas Instruments (TI)'s software tool Filter-proTM can be used to design this type of filter. A second-order Butterworth, Sallen-Key, high-pass filter, etc. filter can be selected. The Butterworth frequency response Sallen-Key topology with maximum flat amplitude is used because it produces more reasonable device values; that is, Capacitors and resistors are within available ranges, allowing for the selection of low-cost, high-precision devices.

The third stage is a 10Hz low-pass filter with a gain of 10. This filter is a second-order Butterworth multiple feedback high-pass filter. The Butterworth frequency response was chosen for maximum flat amplitude. A multiple-feedback topology is used because it yields more reasonable device values; that is, the capacitance and resistance are within the available range, allowing for the selection of low-cost, high-precision devices.

The fourth stage is a 10Hz low-pass filter with a gain of 1. It is similar to the third stage, but with a gain of 1. The goal of the third and fourth stages is to create a 4th order low pass filter. This filter is designed as a second-order, Butterworth, multiple feedback, high-pass filter. The Butterworth frequency response is designed to be flat at maximum amplitude. Multiple feedback topology is used because it produces more reasonable device values; for example, effective parameter values ​​for capacitors and resistors can be used to achieve low-cost and high-precision device selection.