reg[15:0]data_mem [3200-1:0] insufficient table read resources

maifeilaoshi

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Engineers from Altera's official website:

Hello, when I was using FPGA to design DFT simulation, I encountered the problem of insufficient quartus compilation resources. I would like to ask how you can solve this problem. My simulation software is modelsim6.5SE, and the quartus version is quartus13.1SP4. The specific problem is as follows:

file:///C:/Users/MAIFEI~1/AppData/Local/Temp/msohtmlclip1/01/clip_image002.jpg

1. First give the modelsim Simulation result chart, file:///C:/Users/MAIFEI~1/AppData/Local/Temp/msohtmlclip1/01/clip_image004.jpg 2. Quartus compilation result 2.1 Transplanted to quartus for compilation, indicating insufficient resources

file:///C:/Users/MAIFEI~1/AppData/Local/Temp/msohtmlclip1/01/clip_image006.jpg

Refer to the official document, URL

https://www.intel.com/content/www/us/en/programmable/quartushelp/13.1/mergedProjects/hdl/vlog/vlog_file_dir_ram.htm

Write(*ramstyle ="M-RAM"*) reg[15:0]data_mem [3200:0];Map this toRAM, but the compilation result is still like this,

2.2Shield the program in the module in the figure below,

file:///C:/Users/MAIFEI~1/AppData/Local/Temp/msohtmlclip1/01/clip_image008.jpg

[alig n=left]The compilation is immediately reduced to

file:///C:/Users/MAIFEI~1/AppData/Local/Temp/msohtmlclip1/01/clip_image010.jpg

EnterSINCOSmodule and block it

//(*ramstyle = "M-RAM"*)reg[15:0]data_mem [3200:0];

file:///C:/Users/MAIFEI~1/AppData/Local/Temp/msohtmlclip1/01/clip_image012.jpg

Compilation result

file:///C:/Users/MAIFEI~1/AppData/Local/Temp/msohtmlclip1/01/clip_image014.jpg

Definition does not consume resources.

Writing in does not take up any resources, and the logic is the same as above.

But when it comes to reading the table, there will be these problems, and there will be problems with insufficient resources.

3 The results of compiling these writing methods are not very good.

(* ramstyle = "M512" *)reg[15:0]data_mem [`DFT_POINT-1:0];The compilation result is not good.

The core of the problem is how to solve this reading problem, reduce reading resources, and the faster the time, the better.

[img=576,338]file:///C:/Users/MAIFEI~1/AppData/Local/Temp/msohtmlclip1/01/clip_image016.I calculated the time, and found that 80 points of multiplication and addition require 100M clocks 100clk (1us/color] ont="]), my program can't compile even if I calculate 5 modules. I want to calculate (50 modules*3 phases=150 modules) module logic, and the time should be within 15us. How to establish this requirement?

How to read the table of provincial resources

file:///C:/Users/MAIFEI~1/AppData/Local/Temp/msohtmlclip1/01/clip_image018.jpg

coyoo

Insufficient resources, two solutions: 1. Reduce the memory depth; 2. Try a larger device

constant

After reading the document, I found that the RAM resources on the chip are not used much, and they are all implemented using logic resources and registers; I will read less for the time being to reduce the depth of reading

maifeilaoshi

coyoo posted on 2018-8-17 09:08 Insufficient resources, two solutions: 1. Reduce the memory depth; 2. Try a larger device

The design depth cannot be changed at present. If it is changed, the accuracy is not enough. The hardware circuit of the device is fixed and cannot be changed for the time being

maifeilaoshi

constant posted on 2018-8-17 13:29 After reading the documentation, I found that the RAM resources on the chip are not used much, and they are all implemented using logic resources and registers; temporarily, I will read less and reduce the reading...

The memory can only have two read ports. My requirement is to read out 50 groups of 80 different points of data from the same point table at the same time. I have also tried RAM, but it cannot read so many at the same time.