| The add-on circuit shown in Figure 1 generates 1 to 15 bursts and 1 to 15 burst intervals, with the pulse width (frequency) set by an external square wave generator at the input. Using an external square wave generator as the signal source, this add-on circuit generates a variable number of bursts and a variable number of burst intervals. This project in this design requires a TTL burst signal, but resource constraints do not include the cost of a burst generator. The circuit is basically composed of two hexadecimal, divide-by-16 counters, where the left counter generates a user-selectable 0 to 15 pulses and the right counter generates a user-selectable 0 to 15 intervals. Two hexadecimal thumbwheel switches select the number of pulses and intervals.
 Figure 1. This circuit can generate a variable number of burst pulses and intervals.
Counter IC 1 controls the number of bursts, and counter IC 2 controls the number of intervals. Two hexadecimal thumbwheel switches, S 1 and S 2, select the count value. Each switch position is numbered from 0 to 15. S 1 controls the number of bursts (0 to 15), and S 2 controls the number of intervals (0 to 15). To cause either IC 1 or IC 2 counter to count, pin 7 must be high. If pin 7 is low, the counter remains disabled. To input the desired count value into the counter, pin 9 must first be low and then go high. The carry-out signal at pin 15 is normally low until the counter reaches 15 counts, then goes high. When the circuit is powered up, resistor R 1 and capacitor C 1 form an RC time constant power-on reset circuit at pin 1. This power-on reset circuit initializes both counters to the zero state after power is applied. Thereafter, the thumbwheel switches set the count value.
When a clock signal with the required frequency arrives at pin 2 of the counter, counter IC 1 begins counting, while counter IC 2 remains off because the low signal at the carry output at pin 15 of IC 1 is applied to pin 7 of IC 2, disabling counter IC 2. When IC 1 's count reaches 15 , pin 15 of IC 1 goes high and starts IC 2 counting. IC 1 's carry output also passes through the NOT gate IC 3A and is applied to pin 1 of the OR gate IC 4. The presence of a low signal at one of IC 4's inputs—IC 2 is now counting, so the carry output at pin 15 of IC 2 is also low at pin 2 of IC 4 —meaning that there is a low signal at pin 7 of IC 1 , so IC 1 is now disabled. The enable pins of the two counters, IC 1 and IC 2, are cross-connected, so when one counter is counting, the other is disabled. The two counters go back and forth like this, counting to 15 and enabling and disabling each other. Finally, for both counters, when the carry output on IC 2 goes high, the circuit, after reaching the count value of 15 through inverter IC 3B , enters or re-enters the new count value into the two counters, depending on the setting of the thumbwheel switch for the next count.
When IC 1 is counting, the output (gate signal) of IC 3A is high at pin 2 of the AND gate IC 5. This high level allows the clock signal to pass through IC 5 unimpeded to the output. The output of IC 5 is the burst output. When IC 1 is disabled and IC 2 is counting, the gate signal from IC 3A maintains a low signal at pin 2 of IC 5. The output is also low, so no burst is generated. You can configure the circuit to generate more pulses and intervals by cascading multiple counter chips where needed. Alternatively, you can replace switches S 1 and S 2 with an 8-bit write output register so that both the pulse count and the interval count can be controlled by software; otherwise, you can add the gate signal to the control input of the CMOS switch to generate a burst analog signal such as a sine wave at its input.
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