Ten major misunderstandings in PCB design - the endless equal length (I)

ohahaha

Ten major misunderstandings in PCB design - the endless equal length (I) [Copy link]

Author: Wu Jun

1. About equal length

When I first heard the title of "Equal Length Engineer", my friends and I were stunned. Every time this term is mentioned in a seminar, many people smile knowingly.

I don't know since when, equal length has become a fashion, and it has also become an indelible pain in the hearts of PCB design engineers. There are more and more buses that need equal length design, and the equal length rules are becoming more and more strict. 5mil can no longer meet everyone's goals. Engineers who keep improving have begun to challenge 1mil, 0.5mil... and have heard of 100% equal length and no error requirements. Why do we like equal length so much? Open the PCB design file, if you don't see the carefully designed equal length lines, the first reaction in everyone's mind should be contempt, even equal length is not done. I also have the experience of buying motherboards or graphics cards from SEG. When I pick up the board, I first look at the design of the capacitors, and then look at the winding. If there is no winding or the winding design is not beautiful, I will directly pass and change to another brand. Perhaps in our hearts, good equal length is a manifestation of excellent PCB design. I have made an informal statistics. For a slightly more complex high-speed board, the winding of equal length will occupy 20%~30% of the total design time. If the equal length rule is more stringent, or the process control is not good, the equal length is made and then repeatedly modified, this time will be even longer.

2. Those years, we bypassed the equal length together

We often play a game called: Those years, we bypassed the equal length together... Speaking of equal length requirements, let's first talk about what is "margin". "Margin" is the safety spacing reserved during design. Baidu Encyclopedia's explanation is simpler: the extra part is called margin. How much more is needed and what is considered safe is a matter of opinion. Everyone has a different sense of security, so the definition of "margin" is different. However, during timing design, there is a common phenomenon, that is, the margin is magnified layer by layer. For example, the product manager may require the equal length range to be ±100mil, the project manager may be more strict to ±50mil, and then to the specific implementation engineer, it may become ±5mil. When encountering some engineers who lack "sense of security", they wish that the length is completely equal and there is no deviation. Therefore, in the following discussion, we will not be too entangled in whether the equal length is 10mil or ±5mil. We will focus on which equal lengths are unnecessary and which equal lengths will destroy the timing design requirements of the system.

lin20121221

No more follow-up? Looking forward to continuing