About MSP430 pin multiplexing between JTAG and I/O functions

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About MSP430 pin multiplexing between JTAG and I/O functions [Copy link]

Four pins, P1.7 - P1.4, have both I/O and JTAG functionality on the 20- and 28-pin MSP430F1xx devices. The default function of these pins is I/O functionality when the device is powered up. When the test pins are pulled high, these pins are selected for JTAG. The FETs on these devices put these pins in JTAG mode when the interactive in-system debugger is used. For information on releasing pins from JTAG mode when using the debugger, or see the FET Tool User Guide. Note: If you attach external circuitry to shared pins, you must consider how the JTAG signals affect the pins. If you are interactively programming or debugging the device in-system via JTAG, consider the effects the circuit will have. If the circuit will add loading or bias to the shared pins, interfering with JTAG communications, this should be considered. Higher pin count devices have dedicated JTAG pins that can be used for debugging and programming only.