[LPC8N04 Review] 3. Brief Analysis of LPC8N04 Chip

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[LPC8N04 Review] 3. Brief Analysis of LPC8N04 Chip [Copy link]

1. LPC8N04 is based on the NFC specification. The NFC specification has three working states: 2. Adapting to the NFC specification, the logic block diagram of LPC8N04 adapts to the corresponding functions; A more detailed logic block diagram shows the connection of each bus and the composition of the functional blocks. It should be noted that the low voltage management module can be as low as 1.2V, and there are 2 built-in RC oscillator clocks SFRO and TFRO. The system clock SFRO is 8MHz and can be divided down to 62.5kHz. The default clock after the reset state is 500kHz to save power. The corresponding storage management and the corresponding address mapping are as follows. A total of 32kflash memory has 30k available for users. There are 8k SRAM and 4k EEPROM. EEPROM is only available after booting or when the system is automatically upgraded. 3. Corresponding to the power selection, install the following logic execution, LPC8N04 has 2 power supplies: external power supply and built-in NFC/RFID filter. Select through the PSWBAT switch. - When the external power supply voltage VBAT is greater than 1.72V, VBAT and VNFC are powered at the same time, and VBAT battery power supply is preferred; - When the VBAT voltage is less than 1.72V and the VNFC voltage is detected to be greater than 1.72V, VNFC is powered; - VNFC and VBAT can be switched quickly in real time. If one power supply loses power, the other quickly restores the core power supply. It should be noted that when VNFC is powered, a minimum of 100nF capacitor is required in parallel with the GPIO port to ensure the output level is stable. 4. The NFC module is designed according to the following logic diagram. The CMDIN, DATAOUT, Status Register (SR) and SRAM in the above figure are all mapped to the user memory space of the NFC kernel, and communicate through the shared memory space through the read and write commands of NFID. The communication format can be standard NDEF or the original data format. 5. The specific energy harvesting solution, the battery-free power supply solution, is designed according to the following schematic diagram When the display screen is needed, a battery is required, and it is designed according to the following logic diagram