3DES Algorithm and FPGA Design Based on State Machine/Pipeline Technology

lorant

3DES Algorithm and FPGA Design Based on State Machine/Pipeline Technology [Copy link]

The principle of 3DES encryption algorithm is introduced and the FPGA design and implementation of the algorithm are described in detail. The state machine and pipeline technology are used to achieve the best optimization in area and speed; the design of input and output interfaces is added to enhance the flexibility of the algorithm application. Each module is implemented in hardware description language and finally downloaded to the FPGA chip Stratix EP1S25F780C5.