Understanding of SOPC

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Understanding of SOPC [Copy link]

SOPC, also known as the so-called programmable system on chip, usually a system contains CPU, memory, DSP and some IO peripherals, etc., which are placed around FPGA, which greatly increases the area of the system and thus increases the cost of the system. SOPC technology is to put CPU, DSP, timer, IO module into FPGA, and embed NIOS II processor and some commonly used IP cores into it through SOPC builder provided by Quartus II. NIOS II processor is used as the host and other peripherals are used as slaves. The host and slave communicate and access each other through AVALON MM bus. Each peripheral has an address. NIOS II processor can operate the peripheral through this bus, but can only access one peripheral at a time. After the system hardware is built, Quartus II is used to synthesize it, place and route it, and constrain the timing of the hardware system. Then we use C language to program our hardware system through NIOS II eclipse, and run and debug it. Finally, burn the hardware and software files we designed into the configuration chip or FILASH of FPGA, and control the corresponding peripherals through the corresponding bus.