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Published on 2018-1-8 09:28
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Yes, time is tight.
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Published on 2018-1-29 09:19
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yl20084784
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Published on 2018-1-8 09:48
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Published on 2018-1-8 10:43
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Published on 2018-1-8 18:40
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This post is from stm32/stm8
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Published on 2018-1-9 15:54
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Published on 2018-1-9 21:28
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How can I modify the receiver? The test is to read and write ferroelectric memory through SPI. Currently, the order is adjusted, and the ferroelectric reading is normal. If it is not adjusted, the reading will be wrong as described before. I don't know if there is a more reasonable modification.
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Published on 2018-1-9 22:26
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Published on 2018-1-10 10:56
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Published on 2018-1-16 14:41
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star_66666
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Published on 2018-1-16 14:47
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Published on 2018-1-17 18:59
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After testing, the SPI receiving DMA has the following problems: first, change the receiving fifo threshold from 08 to SPI_FIFO_THRESHOLD_01DATA, otherwise part of the received data will always be stored in the fifo; second, shield the following code, otherwise the received data length will be incorrect. I hope it helps you. // if ((hspi
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Published on 2018-1-24 16:40
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Published on 2018-1-26 14:23
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star_66666
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Published on 2018-1-26 15:07
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Published on 2018-1-26 20:48
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star_66666
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Published on 2018-1-26 21:36
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Published on 2018-1-29 09:19
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