Push-pull and half-bridge issues

shaorc

【Ask if you don’t understand】 In the push-pull circuit in the figure, when the base level is high, the upper tube 9013 is turned on and the lower tube 9012 is turned off. When the base level is low, the upper tube is not turned on. Although the b-pole of the lower tube 9012 is at a low level, what I don’t understand is that there is no voltage at the E-pole of the lower tube 9012. How can the lower tube be turned on? In addition, the difference between push-pull and half-bridge is that the push-pull transistor works in the linear region, and the half-bridge is in the switching state. So how to control the working state of the transistor? Is it directly through analog quantity or what?

maychang

Note that the MOS tube gate has a capacitance to ground in the figure (including the Miller capacitance mentioned in a post), which is not drawn in the schematic diagram. When the upper tube is turned on, the capacitor is already charged. When the upper tube is turned off, the lower tube is turned on by the base current of the lower tube (through the optocoupler) and the charged capacitance of the MOS tube gate to ground (as the power supply between the collector and emitter of the lower tube).

shaorc

maychang posted on 2017-12-22 11:32 Note that the MOS gate in the figure has a capacitance to ground (including the Miller capacitance mentioned in a post), which is not drawn in the schematic diagram. When the upper tube is turned on...

Thanks, I made a sketch, and I have follow-up questions [1] You said that there is a capacitor C1 between the lower tube MOS gate and the ground. Do you mean the Miller capacitance? Remember that the Miller capacitance is between the input and output, so it should be C2 between GE, isn't it contradictory? [2] When the upper tube is cut off and the lower tube is turned on, you said that C1 has been charged. How does this charging circuit flow? And it is also the power supply of the CE pole of the lower tube. Is it that the electric energy in C1 flows to the e of the lower tube through C2?

maychang

shaorc posted on 2017-12-22 13:32 Thanks, I made a sketch, and I have a follow-up question [1] You said that there is a capacitor C1 between the lower MOS gate and the ground. Do you mean the Miller capacitor? Remember that the Miller capacitor is the input...

What I said is: "The MOS tube gate in the figure has a capacitance to the ground." That is, the capacitor shown in red in the figure. This capacitance includes the release capacitance between the MOS tube gate and the source, the capacitance between the gate and the drain, and the Miller capacitance.