Why should the PFC bandwidth be controlled at 10~20Hz?

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Why should the PFC bandwidth be controlled at 10~20Hz? [Copy link]

 

Help, why should the PFC bandwidth be controlled at 10~20Hz? I wonder if any of you can explain this to me, thank you~~

qwqwqw2088

The bandwidth of power factor correction is not high, and the low adjustment is slow. Why should it be controlled at 10~20Hz? It needs to be theoretically calculated according to different topologies.

hk6108

APFC achieves forced equalization of supply and demand through time segmentation, corrects phase shift power factor, and controls the current of each pulse so that each pulse current is proportional to the power frequency voltage, creating a better waveform power factor. Even if APFC is successfully started, the load is still in the power frequency channel, and the series loop current is equal everywhere, which means that the output DC cannot be straight! The reference voltage required by the current loop is a pure DC voltage that only changes with the load and can truly reflect the amplitude of the mains. The natural process of the mains plus the ripple caused by the charging and discharging of the load capacitor is interference to the current loop, and we must ignore it!

hk6108

There are three types of information that the voltage regulator is responsible for processing: one is disturbance noise, the second is output changes caused by load changes, and the third is changes in power supply voltage. These are average values or effective values, not instantaneous values, while ripple is an instantaneous value. In fact, this problem also exists in linear voltage regulation circuits. If the dynamic resistance of the tube is not large enough, the power supply rejection ratio will not be high enough, and the rectifier ripple will leak to the load. The error amplifier stage must correct this leakage component together!

qwqwqw2088

hk6108 posted on 2017-12-1 01:54 The voltage regulator is responsible for processing three types of information: disturbance noise, output change caused by load change, and power supply voltage change. These are all average...

The original poster is asking why the bandwidth of PFC should be controlled at 10~20Hz

hk6108

A frequency-sensitive system is used to respond to desired frequencies or ignore unwanted frequencies, and the out-of-passband sensitivity of a frequency-sensitive system increases or decreases in dB per octave.

hk6108

The transition region between the passband and the cutoff frequency is too long, so the bandwidth of the low-pass filter has to be this narrow.

p902432

Since PFC is an AC-DC stage, when AC passes through the rectifier, it will be a voltage of 2*mains frequency. So when it is boosted to 400V, there will be a ripple of 2 times the frequency. In order to avoid being affected by the 2 times mains frequency, the PFC control loop will make the bandwidth fall at 2*AC_Frequency / 10, which is about 12Hz (assuming a 60Hz mains). If it is digitally controlled, please grasp it at 1/20, which is about 6Hz. I am not a graduate of this department, so if there are any errors in my explanation, please help me.

hk6108

If the rectangular coefficient of your band-stop or low-pass filter is 1, then for the band-stop I will only block 100Hz, and for the band-pass I will pass up to 99Hz, that's it!

hk6108

hk6108 posted on 2018-1-24 01:33 If the rectangular coefficient of your band-stop or low-pass filter is 1, then, for the band-stop, I will only block 100Hz, and for the band-pass, I will pass up to 99Hz, and that's it...

There is a typo, it is low-pass, not band-pass.

p902432

Some people do this, and it can improve the voltage loop response of PFC.