| The I 2 C (Inter-Integrated Circuit) bus is a two-wire serial bus developed by PHILIPS for connecting microcontrollers and their peripherals. The I 2 C bus originated in the 1980s and was originally developed for audio and video equipment. Today, it is mainly used in server management, including the communication of individual component status. For example, administrators can query individual components to manage the system configuration or grasp the functional status of components such as power supplies and system fans. Multiple parameters such as memory, hard disk, network, system temperature, etc. can be monitored at any time, which increases system security and facilitates management. 1. I2C bus characteristics The main advantages of the I 2 C bus are its simplicity and efficiency. Because the interface is directly on the components, the I 2 C bus takes up very little space, reducing the space on the circuit board and the number of chip pins, reducing the cost of interconnection. The bus can be up to 25 feet long and can support 40 components at a maximum transmission rate of 10Kbps. Another advantage of the I 2 C bus is that it supports multimastering, in which any device that can send and receive can become the master bus. A master can control the transmission of signals and the clock frequency. Of course, there can only be one master at any point in time. 2. Working Principle of I2C Bus 2.1 Bus composition and signal types The I2C bus is a serial data bus with only two signal lines, one is the bidirectional data line SDA, and the other is the clock line SCL. Bidirectional transmission is carried out between the CPU and the controlled IC, and between ICs, with a maximum transmission rate of 100kbps. Various controlled circuits are connected in parallel on this bus, but just like a telephone, they can only work by dialing their own numbers, so each circuit and module has a unique address. During the transmission of information, each module circuit connected in parallel on the I2C bus is both a master controller (or controlled device) and a transmitter (or receiver), depending on the function it is to complete. The control signal sent by the CPU is divided into two parts: the address code and the control amount. The address code is used to select the address, that is, to connect the circuit to be controlled and determine the type of control; the control amount determines the type of adjustment (such as contrast, brightness, etc.) and the amount to be adjusted. In this way, although each control circuit is hung on the same bus, it is independent of each other and unrelated. 2.2 bit transmission The data on the SDA line must remain stable during the high level period of the clock. The high or low level state of the data line can only be changed when the clock signal of the SCL line is low level, see Figure 1: 
Figure 1 2.3 Start signal When SCL is high, SDA jumps from high to low and starts transmitting data. 2.4 End signal: When SCL is high, SDA jumps from low to high, ending data transmission. 
Figure 2 2.5 Response signal: After receiving 8 bits of data, the receiving IC sends a specific low-level pulse to the sending IC to indicate that the data has been received. After the CPU sends a signal to the controlled unit, it waits for the controlled unit to send a response signal. After receiving the response signal, the CPU determines whether to continue to transmit the signal based on the actual situation. If no response signal is received, it is determined that the controlled unit has a fault. 2.6 Basic bus operations The I2C protocol uses master/slave bidirectional communication. A device that sends data to the bus is defined as a transmitter, and a device that receives data is defined as a receiver. Both the master device and the slave device (AT24C01 in this article) can work in both the receiving and transmitting states. The bus must be controlled by a master device (usually a microcontroller CPU), which generates a serial clock (SCL) to control the direction of the bus transmission and generates start and stop conditions. The data state on the SDA line can only change during the period when SCL is low. During the period when SCL is high, the change of the SDA state is used to indicate the start and stop conditions. See Figure 2. 3. I2C application example AT24C01 AT24C series serial E2PROM has I2C bus interface function, low power consumption, wide power supply voltage (2.5V~6.0V depending on different models), operating current is about 3mA, and the quiescent current is 30μA~110μA depending on the power supply voltage. 3.1 AT24C series E2PROM interface and address selection Since the I2C bus can connect multiple serial interface devices, each device in the I2C bus should have a unique device address. According to the I2C bus rules, the device address is 7-bit data (that is, in theory, 128 devices with different addresses can be connected to an I2C bus system). It and the 1-bit data direction bit constitute a device addressing byte, and the lowest bit D0 is the direction bit (read/write). The highest 4 bits (D7~D4) in the device addressing byte are the device model address. The model addresses of different I2C bus interface devices are given by the manufacturer. For example, the model address of the AT24C series E2PROM is 1010. The lower 3 bits in the device address are the pin address A2A1A0, corresponding to the D3, D2, and D1 bits in the device addressing byte, which are given by the connected pin level during hardware design. 
Figure 3 For the on-chip address of E2PROM, for chips with a capacity of less than 256 bytes (AT24C01/02), 8-bit on-chip addressing (A0~A7) can meet the requirements. However, for chips with a capacity of more than 256 bytes, the 8-bit on-chip addressing range is not enough, such as AT24C16, the corresponding addressing bit should be 11 bits (211=2048). If 256 bytes are 1 page, addressing with more than 8 bits is considered page addressing. In the AT24C series, the page addressing bit is occupied by the device pin address (A2, A1, A0), such as AT24C16 uses A2, A1, A0 as the page address. Once the pin address is used as the page address in the system, the pin shall not be used in the circuit and shall be left floating. The device address addressing bytes of the AT24C series serial E2PROM are shown in Figure 4, and P0 P1 P2 in the table represent the page addressing bits.
Figure 4 3.2 Hardware Implementation of Communication between AT89S51 MCU and AT24C01 E2PROM Figure 5 is a circuit diagram of using AT89S51 P2 port to simulate I2C bus and connect to E2PROM (taking AT24C01 as an example). Since AT24C01 is an open drain, R1 and R2 in the figure are pull-up resistors (5.1k). A0~A2 address pins are all grounded. 
Figure 5 AT24C01 and 51 single-chip microcomputer interface 3.3 AT24C series E2PROM read and write operation software implementation method The read and write operations of the AT24C series E2PROM fully comply with the master-receive-slave-transmit and master-transmit-slave-receive rules of the I2C bus. 3.3.1 AT24C01 write operation Write operations are divided into byte write and page write. The page write operation varies according to the bytes loaded into the chip at one time. For the timing of address, response and data transfer of page write, please refer to Figure 6 and Figure 7. The continuous write operation is a write operation that continuously loads n bytes of data to the E2PROM. n varies with different models, and the number of bytes that can be loaded at one time is also different. AT24C01/02 8 bytes/page
AT24C04/08/16 16 bytes/page 
Figure 6 Timing diagram of writing a byte 
Figure 7 Timing diagram of writing a page 3.3.2 AT24C01 Read Operation There are three basic read operations: current address read, random read, and sequential read. Figure 10 shows the timing diagram for sequential read. It should be noted that the 9th clock cycle of the last read operation is not "don't care". To end the read operation, the host must issue a stop condition during the 9th cycle or keep SDA high during the 9th clock cycle and then issue a stop condition. The internal address of the AT24C series chip is automatically increased by 1 after receiving the address of each data byte. Therefore, when loading specified data bytes within a page, you only need to enter the first address. If the loaded bytes are more than the maximum number of bytes specified, the data address will be "rolled up" and the previous data will be overwritten. In order to specify the first address during continuous read operations, two pseudo-byte writes are required to give the device address and the on-chip address. The start signal and the device address (read) are repeated once, and the data at the address can be read. Since the write operation is not performed during the pseudo-byte write, the address is not increased by 1. After each byte is read, the address is automatically increased by 1.
In the read operation, the receiver does not return a positive response (keep SDA high) after receiving the last data byte, and then sends a stop signal. 
Figure 8 Read the current address content 
Figure 9 Reading content at any address 
Figure 10 Reading continuous address content 4 24C01 single-byte read and write program written in assembly ; ===========================================================
; 24C01 memory I2C bus experiment assembly language example
; =================================================================
;
; ew51 simulation programmer supporting experimental board learning routines
;
; Zhongshan MCU Learning Network Zhijia Technology Webmaster: Yifeng
;
; http://www.zsMCU.com
; E-mail:info@zsmcu.com
; ======================================================= SDA EQU P2.0
SCL EQU P2.1
Address EQU 08H
I2CData EQU 09H ORG 0000H START: MOV SP,#60H MOV Address,#00H
MOV I2CData,#55H CALL I2C_WRITE ; write data MOV I2CDATA,#0AAH ;
MOV Address,#00H
CALL I2C_READ MOV I2CData,A ; read data NO
NO MAIN: JMP MAIN /*
= ...
I2C_WRITE: I2C_WRITE_A: LCALL I2C_START MOV A,#10100000B
LCALL I2C_SEND8BIT
LCALL I2C_ACK JC I2C_WRITE_A ;=1, means no confirmation, send again MOV A,Address
LCALL I2C_SEND8BIT
LCALL I2C_ACK
MOV A,I2CData
LCALL I2C_SEND8BIT
LCALL I2C_ACK
LCALL I2C_STOP RIGHT /*=============================================================
Read one byte Address address Data The data read
=====================================================================*/ I2C_READ: I2C_READ_A: LCALL I2C_START
MOV A,#10100000B
LCALL I2C_SEND8BIT
LCALL I2C_ACK JC I2C_READ_A ;=1, indicating no confirmation, send again MOV A,Address
LCALL I2C_SEND8BIT
LCALL I2C_ACK I2C_READ_B: LCALL I2C_START
MOV A,#10100001B
LCALL I2C_SEND8BIT
LCALL I2C_ACK JC I2C_READ_B LCALL I2C_RECEIVE8BIT
MOV I2CData,A
LCALL I2C_ACK
LCALL I2C_STOP RIGHT ;===========================================================
;Send start signal I2C_START: SETB SCL
SETB SDA
NOP
NOP
CLR SDA
NOP
NOP
CLR SCL RIGHT ;============================================================
;Send end signal I2C_STOP: CLR SDA
NOP
NOP
SETB SCL
NOP
NOP
SETB SDA RIGHT ;===========================================================
;Send receive confirmation signal I2C_ACk: SETB SDA
SETB SCL
NOP
NOP
JB SDA,I2C_ACK0
CLR C
SJMP I2C_ACK_END I2C_ACK0:
SETB C I2C_ACK_END:
CLR SCL RIGHT ;===========================================================
;Send eight bits of data I2C_SEND8BIT: MOV B,#08H
I2C_SEND8BIT_A: RLC A
MOV SDA,C
SETB SCL
NOP
NOP
CLR SCL DJNZ B,I2C_SEND8BIT_A RIGHT ;==========================================================
; Receive eight bits of data I2C_RECEIVE8BIT: MOV B,#08H
CLR A
SETB SDA I2C_RECEIVE8IT_A: SETB SCL
NOP
NOP
MOV C,SDA
RLC A
CLR SCL
DJNZ B,I2C_RECEIVE8IT_A RIGHT 5. 24C01 single-byte read and write program written in C language
/*=============================================================
24C01 memory I2C bus experiment C language example
============================================================ ew51 simulation programmer supporting experimental board learning routine Zhongshan MCU Learning Network Zhijia Technology Webmaster: Yifeng http://www.zsmcu.com E-mail:info@zsmcu.com =======================================================*/ #include
#include
sbit SDA=0x90;
sbit SCL=0x91; // Function declaration unsigned char i2c_read(unsigned char);
void i2c_write(unsigned char,unsigned char);
void i2c_send8bit(unsigned char);
unsigned char i2c_receive8bit(void);
void i2c_start(void);
void i2c_stop(void);
bit i2c_ack(void); //======================================================= void main(void) { unsigned char dd;
i2c_write(0x00,0x55);
_nop_();
dd=i2c_read(0x00); for(;;)
{} } /*==============================================================
i2c_write(address, data), write one byte
===================================================================*/ void i2c_write(unsigned char Address,unsigned char Data) { do{
i2c_start();
i2c_send8bit(0xA0);
}while(i2c_ack()); i2c_send8bit(Address);
i2c_ack();
i2c_send8bit(Data);
i2c_ack();
i2c_stop(); return;
} /*==============================================================
i2c_read(address, data), write one byte
===================================================================*/ unsigned char i2c_read(unsigned char Address) { unsigned char c;
do{
i2c_start();
i2c_send8bit(0xA0);
}while(i2c_ack()); //=1, means no confirmation, send again i2c_send8bit(Address);
i2c_ack(); do{
i2c_start();
i2c_send8bit(0xA1);
}while(i2c_ack()); c=i2c_receive8bit();
i2c_ack();
i2c_stop();
return(c); } //==========================================================
//Send start signal void i2c_start(void) { SDA = 1;
SCL = 1;
SDA = 0;
SCL = 0;
return;
} //Send end signal void i2c_stop(void) { SDA = 0;
SCL = 1;
SDA = 1;
return; } //Send and receive confirmation signal bit i2c_ack(void) { bit ack;
SDA = 1;
SCL = 1;
if (SDA==1)
ack = 1;
else
ack = 0;
SCL = 0;
return (ack); } //Send eight bits of data void i2c_send8bit(unsigned char b) { unsigned char a;
for(a=0;a<8;a++)
{
if((b
SDA = 1;
else
SDA = 0;
SCL = 1;
SCL = 0;
} return;
} //Receive eight bits of data unsigned char i2c_receive8bit(void) { unsigned char a;
unsigned char b=0;
for(a=0;a<8;a++)
{ SCL = 1;
b=b<<1;
if (SDA==1)
b=b|0x01; //bitwise OR
SCL = 0; }
return (b); } 6. The matters that should be paid attention to in the application of I2C bus are summarized as follows: 1) Strictly follow the requirements of the timing diagram 2) If connected to a microcontroller interface with an internal pull-up resistor on the port line, no external pull-up resistor is required. 3) In order to coordinate the corresponding transmission rate in the program, a certain delay can be added after the instruction of the interface line operation by using the NOP instruction. 4) In order to reduce the possibility of accidental interference signals rewriting the data in the EEPROM, a flag word can be written in the unused space inside the EEPROM. A test is performed every time the power is turned on or reset to determine whether the EEPROM has been accidentally rewritten. Note: The first three sections of this article are modified and compiled by me from various articles collected from the Internet.
The software parts of Sections 4 and 5 are written by me. Due to my limited level, please forgive me for any errors. | 
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