Clever use of digital phase-locked loop to measure car speed

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Clever use of digital phase-locked loop to measure car speed [Copy link]

IntroductionThe

phase-locked loop was born in the 1930s. In recent years, phase-locked technology has been used in the fields of communication, aerospace, measurement, television, atomic energy, motor control, etc., and can perform signal extraction, signal tracking and synchronization, modulation and demodulation of analog and digital communications, frequency synthesis, filtering and other functions with high performance. It has become one of the basic components commonly used in electronic equipment. In order to facilitate adjustment, reduce costs and improve reliability, there are currently a variety of integrated phase-locked loop circuits with different performances, mainly divided into analog and digital. The

digital phase-locked chip 4046 has a simple structure, convenient wiring, and easy function expansion. It has been widely used in audio generator design, phase detection, frequency synthesis, voltage-frequency conversion, etc. This article uses the phase-locked and voltage-controlled oscillation principles of 4046, combined with the frequency division function of the counter, and measures the speed of different cylinder cars through counting and decoding display.

2 Functions of digital phase-locked loop 4046 and its application in this design

2.1 Introduction to the functions of digital phase-locked loop 4046 The

digital phase-locked loop 4046 contains two phase comparators, a voltage-controlled oscillator (VCO), a source follower and a Zener diode. The comparator has two common signal input terminals, one is the input signal terminal and the other is the comparison signal input terminal. For large amplitude signals, they can be directly coupled to the comparator input terminal. For small amplitude signals, they can be coupled to the amplifier through a capacitor and then sent to the signal input terminal.

Phase comparator 1 is an OR gate that generates a phase difference signal (phase comparator 1 output) and maintains a 90° phase shift at the center frequency of the output signal of the voltage-controlled oscillator. As long as the phase difference between the input signal and the comparison signal (duty cycle is 50%) remains constant, the center frequency of the output signal of the voltage-controlled oscillator tracks the frequency of the input signal, which is also the essence of the phase-locked loop.

Phase comparator 2 is an edge-triggered digital storage network that generates a phase difference signal (phase comparator 2 output) and a lock signal (phase pulse output), and maintains a 0° phase shift at the center frequency of the output signal of the voltage-controlled oscillator. As long as the phase difference between the input signal and the comparison signal (regardless of the duty cycle) remains constant, the center frequency of the output signal of the voltage-controlled oscillator tracks the frequency of the input signal.

The signal generated by the voltage-controlled oscillator (VCO) is output from VCO OUT. The oscillation frequency is determined by the voltage-controlled oscillator input signal (VCO IN) and the capacitor between pins 6 and 7 and the resistor connected to pins 11 and 12. When the peripheral parameters are determined, the oscillation frequency is linearly related to the voltage-controlled oscillator input signal. The

source follower is grounded through an external resistor of more than 10kΩ. When the INHIBIT input signal is high, the voltage-controlled oscillator and source follower are shielded to reduce power consumption. The Zener diode mainly plays a voltage stabilization role.

---4046 has the following main features:
---(1) Wide power supply voltage range (3.0～18V);
---(2) Low power consumption (70μA);
---(3) High and stable oscillation frequency (1.3MHz);
---(4) Small frequency temperature drift;
---(5) Good VCO output linearity (<1%).

2.1 Application of digital phase-locked loop 4046 in this design

In this design, the sensor collects the spark signal in the automobile ignition system. This signal is limited, filtered, and stabilized, and sent to the non-inverting input of the voltage comparator. It is compared with the constant voltage value of the inverting input. The output signal is a rectangular pulse, and the high level is the power supply voltage value of the operational amplifier. The processed signal is sent to the input signal port of the digital phase-locked loop 4046. The second phase comparator of 4046 is used. When the phase difference between the output signal (pin 4) and the input signal is constant, the output signal frequency is an integer multiple of the input signal frequency. The frequency depends on the voltage of the output signal of the phase comparator after low-pass filtering, the capacitance between pins 6 and 7, and the external resistor on pins 11 and 12.

3 Design circuit for measuring automobile speed

For 4-cylinder, 6-cylinder and 8-cylinder automobile engines, in order to obtain a unified speed calculation formula, the output signal of 4046 needs to be divided differently. For 4-cylinder automobile engines, the output signal of 4046 needs to be divided by 6, for 6-cylinder automobile engines, the output signal of 4046 needs to be divided by 4, and for 8-cylinder automobile engines, the output signal of 4046 needs to be divided by 3. The counter has a frequency division function. In this design, the CMOS chip 4018 with a variable counter function is selected. As long as the 6th pin of the 4018 chip is connected to the 1-pin DATA terminal, a 6-bit counter is formed to divide the input clock signal by 6; as long as the 4th pin of the 4018 chip is connected to the 1-pin DATA terminal, a quaternary counter is formed to divide the input clock signal by 4; the 4th and 5th pins are connected to the 1-pin DATA terminal after ANDing to form a ternary counter to divide the input clock signal by 3; a multi-way switch can be used to measure the speed of automobiles with different cylinders.

The output signal of 4046 is counted by the counter, and after the data is latched, it is sent to the decoding circuit. The decoding output drives the common cathode light emitting diode to directly display the measurement result.

The entire measurement system can be represented by the following principle block diagram.

4 Simulation of key design links

The key links of this design are the phase locking and voltage controlled oscillation functions of the digital phase locked loop 4046 and the frequency division function of the variable counter 4018. The circuit design and plate making software Protel 99 contains a powerful analog/digital mixed signal simulator, which can perform transient analysis and display the waveform of the circuit node, thereby verifying the feasibility of the design. The simulation function of this software can be used to analyze the functions of 4018 and 4046 and their application in this design.

4.1 Simulation of the frequency division function of 4018

4.1.1 Implementation of 6-frequency division

From the above analysis, it can be known that as long as the 6-pin output of 4018 is connected to the 1-pin DATA terminal, 4018 becomes a hexadecimal counter, and the circuit connection is shown in Figure 3.

During simulation, a square wave signal with a frequency of 1MHz is added to the clock CLK terminal of 4018, and the input signal Ui and the output signal Uo are observed. The waveform diagram is shown in Figure 4. The measurement cursors of the software are used to measure the frequencies of the two signals. The frequency of Ui is exactly 6 times the frequency of Uo. The 6-frequency division of the input signal is successfully achieved with 4018.

4.1.2 Implementation of 4-Division and 3-Division

As long as the 4th pin of the 4018 chip is connected to the DATA terminal of the 1st pin, the input clock signal can be divided by 4. After the 4th and 5th pins are ANDed together and then connected to the DATA terminal of the 1st pin, the input clock signal can be divided by 3. The corresponding circuit connection diagram and simulation waveform will not be repeated here.

4.2 Simulation of the Phase-Locked Function and Voltage-Controlled Oscillation Function of
40464.2.1 Simulation of the Phase-Locked Function of 4046

There are two phase comparators inside 4046. Phase comparator 2 is used in this design to compare the phase of the signal at the signal input end (pin 14) with the signal at the comparison input end (pin 3), and convert the phase difference into a pulse signal output. This signal is filtered by a low-pass filter and used as the input signal of the voltage-controlled oscillator. As long as the phase difference between the signals at pins 14 and 3 is constant, the input signal of the voltage-controlled oscillator is a constant value, and the output signal frequency of the voltage-controlled oscillator is a multiple of the signal frequency at pin 14. The actual circuit connection diagram is shown in Figure 5.

In Figure 5, the signal collected and pre-processed by the sensor is input from the signal input terminal (pin 14), the output signal of the voltage-controlled oscillator (pin 4) is fed back to the comparison signal input terminal (pin 3) after being divided by 4018, and the signal after phase detection is output from the phase comparator 2 (pin 13). This signal is sent to the voltage-controlled oscillator input terminal (pin 9) after low-pass filtering. The output signal frequency is determined by the voltage-controlled oscillator input signal and the capacitor C1 between pins 6 and 7 and the resistors R1 and R2 on pins 11 and 12.

When simulating the phase-locked function of 4046, a rectangular wave signal with a frequency of 60Hz, a high level of the power supply voltage (10V), and a duty cycle of 1/4 is input from pin 14, and a rectangular wave signal with a frequency of 60Hz, a high level of the power supply voltage (10V), and a duty cycle of 1/2 is input from pin 3. The phase difference between the two is constant. The signal output from the phase comparator 2 is filtered to become a DC signal and sent to the voltage-controlled oscillator input terminal. The corresponding simulation waveform is shown in Figure 6.

It can be seen from the figure above that when the phase difference between the input signal and the comparison signal remains constant, the signal after phase detection is processed by low-pass filtering to become a DC signal, which controls the output signal frequency of the voltage-controlled oscillator.
4.2.2 Simulation of the voltage-controlled oscillation function of 4046

When the peripheral parameters are determined, the output signal frequency of the voltage-controlled oscillator of 4046 depends on the size of the DC signal at the VCO IN terminal. By setting different input DC signal voltages, the output signal waveform is observed. The circuit connection diagram used is shown in Figure 7.

A DC voltage of 1.0 to 7.0V is applied to the VCO IN terminal respectively, and the output signal waveform at the VCO OUT terminal is observed. The resulting waveform diagram is shown in Figure 8.

The period of each output signal is measured by measuring the cursor, and then converted into frequency. The relationship between the waveform frequency and the input DC voltage is shown in Table 1.

The following conclusions can be drawn from the above waveform display and measurement data: the output signal frequency of the voltage-controlled oscillator has a good linear relationship with the input voltage, and the output signal frequency exceeds the audio range.

5 Conclusion

This design uses the phase-locked and voltage-controlled oscillation functions of the digital phase-locked chip to generate high-frequency oscillations, drive the variable counter to perform different frequency divisions, and generate a signal proportional to the vehicle speed, which is counted and decoded to display the measurement results. With reasonable sensor acquisition signals, it can be used to measure the vehicle speed of different cylinders, and has certain practical value and application prospects.