Discussion on the stability of single chip microcomputer system in the field of measurement and control

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Discussion on the stability of single chip microcomputer system in the field of measurement and control [Copy link]

In recent years, the application of single-chip microcomputer systems in the field of industrial measurement and control has become more and more extensive. However, for industrial sites with harsh environments, the reliability and safety of this new type of microcontroller has become a big problem. Programs that run normally in the laboratory cannot run in the industrial site, or they run unstably and often crash. Here we mainly discuss how to enhance the stable operation of the system through software technology.

When the CPU of the system is affected by interference signals, the system will go out of control. The most typical fault is to destroy the state value of the program counter PC . This causes the program to "fly around" in the address space or fall into an infinite loop. There are several ways to deal with this situation:

1. Instruction redundancy technology;

2. Software trap technology;

3. Watchdog technology.

We use the MCS-51 single-chip microcomputer as an example.

1. Instruction Redundancy Technology

We know that instructions consist of opcodes and operands. The opcode indicates what kind of operation the CPU is going to complete, and the operand is the object of the opcode. Single-byte instructions only have opcodes and implicit operands; two-byte instructions, the first byte is the opcode, the second byte is the operand; three-byte instructions, the first byte is the opcode, and the last two bytes are the operands. When the CPU fetches instructions, it first fetches the opcode and then the operand. How to judge whether it is an opcode or an operand is to fetch the order of instructions. The order of fetching instructions is completely controlled by the instruction counter PC . Therefore, once the PC is disturbed and an error occurs, the program will deviate from the normal track and "fly around", which will cause the operand to be treated as the opcode, or the opcode to be treated as the operand. However, as long as the PC pointer falls on a single-byte instruction, the program can be put on the right track. Therefore, in order to quickly put the program on the right track, we should use more single-byte instructions and artificially insert some single-byte instructions NOP in key places , or rewrite valid single-byte instructions. This is called instruction redundancy.

A common method is to insert two single-byte NOP instructions after some double-byte or three-byte instructions, or to insert two NOP instructions before some instructions that determine the flow of the program . Some important instructions can also be placed repeatedly.

However, the condition for using instruction redundancy technology to put the program back on track is that the flying PC must point to the program running area.

2. Software Trap Technology

When the flying program enters the non-program area, we can set a software trap to intercept the flying program and guide the program to a fixed location. In this way, we can put the captured program back on track.

The software trap mainly reintroduces the program to its reset entry, that is, we set the following instructions in the appropriate place:

NOP

NOP

LJMP 0000H

For the arrangement of software traps, we mainly arrange them in the following areas: unused interrupt area, unused EPROM space and non- EPROM space, program running area, and interrupt service program area. Here we mainly look at the first three types:

1. Unused interrupt area

If the unused interrupt is opened due to interference, we can write the interrupt service routine like this:

NOP

NOP

POP D1 ; Pop out the original error breakpoint

POP D2 ; Pop out the original error breakpoint

PUSH 00H

PUSH 00H ; rewrite the breakpoint address to 0000H

RARELY

2. Unused EPROM area

Suppose we use a 2764 , but do not use the entire storage area. At this time, we can fill the unused area with 020000 data, so that when the program is entered, it will quickly get on track. This instruction is actually the machine code of " LJMP 0000H ".

3. Non- EPROM space

The program space of the microcontroller system is 64K . Under normal circumstances, the EPROM we use will not occupy all the space. Assuming that our current EPROM occupies 16K space, the remaining 48K space will be unused. When the flying PC falls into these spaces, the data read in will be FFH , which is : MOV R7 , the machine code of the A instruction, which will modify the content of R7 . Therefore, when the program flies into the non- EPROM chip area, it not only cannot be imported into the normal area, but also destroys the content of R7 .

We know that when the CPU reads the program memory, a PSEN signal will be generated. We can use this signal, plus an address decoding signal of the non- EPROM area, to form a selection signal to start an idle interrupt, and then use the software trap method to import the program from the interrupt program to the normal program. We can see the following figure:

INT0

PSEN

Non- EPROM address select signal

We can also use a buffer through hardware methods to directly write a value to the data line. The principle is the same as the above method.

3. Software Watchdog Technology

We know that the function of the watchdog is to prevent the program from looping or running away. The hardware watchdog uses a timer to monitor the running of the main program. That is to say, during the running of the main program, we need to reset the timer before the timing time is up. If there is a dead loop, or the PC pointer cannot return, then the microcontroller will be reset after the timing time is up.

The principle of software watchdog technology is similar to this, but it is implemented by software. Let's take the 51 series as an example. We know that there are two timers in the 51 microcontroller, and we can use these two timers to monitor the operation of the main program. We can set a certain timing time for T0 , and assign a value to a variable when a timing interrupt occurs. This variable has an initial value at the beginning of the main program. Here, the timing value we want to set should be less than the running time of the main program. In this way, the value of the variable is judged at the end of the main program. If the value changes as expected, it means that the T0 interrupt is normal. If there is no change, the program is reset.

We use T1 to monitor the operation of the main program. We set a certain timing time for T1 and reset it in the main program. If it cannot be reset within a certain time, the timing interrupt of T1 will reset the microcontroller. Here, the timing time of T1 should be set greater than the running time of the main program to leave a certain margin for the main program. Whether the interrupt of T1 is normal or not is monitored by the T0 timing interrupt subroutine. This forms a cycle, T0 monitors T1 , T1 monitors the main program, and the main program monitors T0 , thereby ensuring the stable operation of the system.