Double the maximum load current using two converters in parallel

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Double the maximum load current using two converters in parallel [Copy link]

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画中画广告结束Automotive equipment, industrial equipment, and FireWire peripherals all require efficient, space-saving power supplies capable of delivering high current at high voltages. The problem is that high-voltage, high-current monolithic step-down converters cannot control the required load current.

One solution is to connect two converters in parallel to double the maximum load current, but the standard buck converter needs to be modified to maintain load sharing (sharing) between the two converters and stability, and reduce input/output voltage ripple.

Figure 1 shows a DC-DC converter with an input voltage of 8 to 40V and an output voltage of 5V at a maximum load current of 4A. It uses two LT3430 60V 3A (peak switch current) single-core buck converters in parallel. The circuit uses a multiphase oscillator with spread spectrum modulation (SSFM) to keep the two converters synchronized (180° phase shift) at frequencies up to 250kHz. Figure 2 shows the efficiency of the circuit in Figure 1.

Synchronization is important because the fixed switching frequency of 200kHz will have a slight difference between the two converters. If the two converters are allowed to operate at different switching frequencies, over time the output ripple may carry some undesirable low frequency ripple at a frequency equal to the difference between the two converter frequencies.

Maintaining a 180° phase difference between the two converters can reduce input/output ripples. Generally, when the current of one IC increases, the current of the other IC is decreasing, so that their ripple currents cancel each other out, thereby reducing the pressure on the input and output energy storage capacitors. On the contrary, if the two ICs work in phase, the two ICs need to draw current from or deliver current to the capacitor at the same time in each cycle, which will double the circuit ripple compared to a single IC.

The SSFM mode of the synchronization signal from the LTC6902 is set between 235kHz and 250kHz, which reduces EMI peaks. This effect can be seen with the switching frequency fixed at 250kHz. By changing the jumper position (grounding the component lead of the LTC6902), the SSFM mode can be cleared and the frequency set to 250kHz.

Assuming proper layout and a duty cycle between 40% and 60%, the dual converter circuit requires only half the capacitance of the single IC circuit at a load current of 4A. In applications requiring a wide range of duty cycles, the ripple of the dual IC circuit is a little more than half of that of the single IC circuit.

In the case of a wide load range, the best setting for both heat dissipation and efficiency is to make the two ICs share the load evenly. This can be achieved by connecting the outputs of the two error amplifiers (VC _pins ) together to eliminate the voltage difference and feedback gain between the two error amplifiers. In addition, within the tolerance range of the inductor and regulator gain, the two ICs can work together. Over the entire load current range, the current shared by the two devices in this design is approximately equal. Using two independent 2.5A, 22μH power inductors is better than using a single 5A, 10μH inductor because the total volume of the two inductors is 2 times smaller than that of a single large inductor, which can minimize the height of the components.

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