Analog Technology Trends in Wireless Communications (Cellular Base Stations)

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Analog Technology Trends in Wireless Communications (Cellular Base Stations) [Copy link]

Everyone wants more for less: smaller, more features, less power, better packaging, lower cost, etc. More features are better, and to meet this demand, today's discrete solutions are tomorrow's integrated solutions. This means that smaller, more power, lower cost, and higher reliability will drive the market. Integration and innovation are key goals that manufacturers must achieve to succeed in the market.
Mobile computing and communication devices are now commonplace. The development of digital electronics is the driving force behind this development, but analog electronics is equally important and both are indispensable. Digital
is "base 2", which means that the signal is either one state or another, either "on" or "off", either "true" or "false", either "1" or "0", and so on.
Analog signals operate continuously in various states. Analog signals are the way everything in the world works and the way human senses perceive the world. Therefore, analog signal processing is required to process signals such as light and sound in the "real" world.
In cellular base stations, digital electronics perform many complex functions, usually under the control of software and firmware. Analog electronics are required to transmit and receive signals. Data converters are used to convert signals from one domain to another, from digital to analog and back to digital. Figure 1 shows the transmit (Tx) and receive (Rx) architectures and the associated semiconductor processes commonly used today.

The basic function of the transmit side architecture is to generate a digital domain signal by running a "program" in a DSP (digital signal processor) or ASIC (application-specific integrated circuit), which is then further processed by a dedicated digital electronic device called a DUC (digital up converter), converted to an analog signal by a DAC (digital-to-analog converter), mixed, filtered, amplified, and sent through the antenna.
The process on the receive side is exactly the opposite. The analog signal received by the antenna is amplified, mixed, and filtered by analog electronics, and then converted to digital by an ADC (analog-to-digital converter). Once in digital format, the signal is first processed by a dedicated electronic device called a DDC (digital down converter) and then processed by an ASIC or DSP.
Many cellular base station manufacturers are striving to increase system performance and reduce size and cost. There are two ways to achieve this goal, one is the linearization of the power amplifier (PA) and the other is the integration of electronics, which will develop in these two directions in the near future. Mobile
phones (handheld terminals) have successfully integrated transmit and receive functions. This is also the goal of base station design, but the performance level required by base stations is much higher, so it is still difficult to achieve the goal now.

PA Linearization
To meet out-of-band transmission specifications, PAs (power amplifiers) operate at higher class A with less than 10% efficiency. This requires large devices and a lot of power. To optimize PA size and efficiency, linearization techniques are being developed.
One of the simplest PA linearization methods is to reduce the crest factor. Reducing the crest factor compresses the signal "peaks" and reduces the average power required for linear operation. It also adds "noise" to the signal so that the overall available crest factor is reduced by about 3dB and still meets the EVM (error vector magnitude) specification for BER (bit error rate). However, 3dB is still 3dB.
Another, even greater breakthrough in PA linearization technology is the ability to pre-distort the signal. Pre-distortion is the "magic weapon" of PA linearization, which has the potential to make PA efficiencies better than 25%. However, this is also very complex and requires understanding the PA distortion characteristics - and the way this characteristic varies is very complex. The basic idea of this method is to pre-distort the PA so that the transmission signal is not distorted when it passes through the PA and meets the transmission mask requirements. The challenge is that the distortion (i.e., nonlinear) characteristics of the PA vary with time, temperature, and bias, and vary from device to device. Therefore, while it is possible to characterize a device and design the correct predistortion algorithm, it is not economically feasible to do this for every device. To account for these deviations, a feedback mechanism must be used to sample the output signal and use it to correct the predistortion algorithm.

Integration: Common Functions and Common Technologies
Another trend in cellular base stations that is in line with the expectations of electronics is to integrate more functions. The goal of integration is to make functional blocks smaller, reduce power consumption, reduce cost, and improve reliability.
The first step usually taken in integration is to put multiple components in one package. So, instead of using two ADCs, our diversity receiver uses a dual-function component. Another approach is to integrate functions using the same process technology. So, amplifiers and mixers can be integrated together.
Architectural development is another way to reduce the number of components and improve performance. One example of this is the use of quadrature modulators and demodulators.
Figure 2 shows a more integrated transmitter including PA linearization. In this example, crest factor reduction (CFR) and digital predistortion (DPD) are integrated into a single chip with DSP or microprocessor (μC) control. To achieve diversity, we use two transmit paths and integrate multiple DUCs in one component. As can be seen, quadrature modulation requires two dual DACs and the amplifier is combined into the modulator. The transmitted signal is sampled at the PA and fed back for linearization purposes as described above. This is basically a receive path with integrated amplifier and mixing stages, with two ADCs in one package.

Figure 3 shows a more integrated receiver with a diversity receiver. Each channel integrates an LNA (low noise amplifier) with a quadrature demodulator, filtering, variable gain, and dual ADCs. By using quadrature demodulation, the DDC function can be replaced with a simpler Nyquist filter and decimation filter.

Integration: Digital vs. Analog
The real challenge comes from mixing digital and analog functions on a single chip. High-frequency digital logic generates "noise" that is conducted through power supplies, other common connections, and radiated paths. Noise is critical in analog circuits because it determines the signal-to-noise ratio (SNR), which is a key quality factor for dynamic range in analog systems. High-performance digital means fast logic speed, and high-performance analog means high dynamic range. Placing the two on the same PCB (printed circuit board) requires great engineering skills, and integration at the chip level is even more difficult.
Although advanced analog voltages have recently been successfully reduced from 12V to 5V and 3.3V, they are difficult to reduce further to the current levels of digital core voltages. This is because noise does not decrease when the operating voltage is reduced, so the analog operating voltage must be kept high enough to provide good SNR. Lower voltages are not enough to provide the performance headroom required for high dynamic range analog signals.
The most advanced digital processes do not include high-performance analog components. In addition, there is a large gap in process feature size between the most advanced digital processes and the most advanced analog processes. For example, the latest DSPs that Texas Instruments (TI) has just put into production are manufactured using the C027 90nm process, while TI's newest high-performance analog processes, HPA07 and BiCom-III, are based on a 350nm CMOS process.
The starting point for analog processes is a stable digital process. Whatever linear functions the digital process transistors provide are provided as on-chip analog functions. Even so, in the early stages of the process, the focus is still digital; analog functions are limited to those items that do not require additional process steps or modifications. Once the process matures and successfully manufactures the latest series of high-speed logic products, digital process developers will then move on to the next process node, and analog component designers will work to introduce higher analog functions using that process. It takes time to develop and improve analog components. High-performance analog processes are usually introduced several years after the basic digital process is put into production.
TI's HPA07 and BiCom-III advanced analog processes are based on a 350nm CMOS process that was originally developed for digital components. Therefore, both have extensive digital libraries. The power requirements and speed of the basic CMOS process currently make it unsuitable for leading-edge DSPs and ASICs. At the same time, process maturity has enabled analog component designers to introduce highly specialized processes that can meet the different product needs of a variety of different end-equipment applications.

HPA07
The HPA07 precision analog CMOS process is designed for low noise in communications and other systems where analog and high-speed data functions must coexist with minimal signal interference. The process facilitates analog integration, achieving good logic gate density, good analog component performance, and providing buried layer isolation to protect analog signals from interference from high-frequency digital circuits.
HPA07 integrates 5V and 3.3V digital logic devices and memory, and adds transistors and passive components dedicated to analog functions. The process is carefully designed to meet high performance standards in terms of noise, transistor linearity, and component matching and stability. It is extremely suitable for operational amplifiers, ADCs, DACs, voltage references and regulators, and instrumentation amplifiers. HPA07 also allows flexible designs with up to 40 components while keeping costs within control with relatively little shielding.
HPA07 CMOS transistors have low noise and distortion, and they are manufactured using buried channel PMOS technology, which achieves a very high gain bandwidth/noise ratio for this type of device. Laser-trimmed silicon chromium (SiCr) thin film resistors with very low temperature coefficients provide stability over the entire operating temperature range. Separate processing of the wafer allows for 16-bit initial resistor matching, four more bits than is typical in the industry. It also features drain-extended CMOS transistors that can handle voltages up to 30V for high-amplitude signal applications.
In addition, the HPA07 offers metal-insulator-metal (MIM) capacitors with a 4x improvement in voltage coefficient, high-precision TiN-Poly capacitors, thicker copper metal routing layers and memory. These features enable analog processes to deliver high-precision integrated products. The OPA300
and OPA301 are just the first of many products to be produced by this process. They feature unity-gain bandwidth of 150MHz, low voltage noise of 3nV/√Hz, and settling time of 0.1% within 30ns. The OPA300 operates from a single supply voltage of 2.7V (±1.35V) to 5.5V (±2.75V) and features a shutdown feature that reduces the supply current to 5μA, which is useful for portable, low-power applications. They provide a low-power single-supply solution for driving high-speed SAR ADCs without compromising performance.

BiCom-III
BiCom-III is a silicon-germanium (SiGe) process developed for ultra-high precision analog integrated circuits. It is a dielectrically insulated silicon (Si) based process with germanium (Ge) added to the base. The addition of germanium to the base greatly increases carrier mobility, enabling extremely fast transient times. The process enables true complementary bipolar NPN and PNP transistors with a transmission frequency (f _T ) of 18 GHz and a maximum frequency (f _max ) of 40-60 GHz. The complementary transistors enable class AB amplifier stages, which are critical for designing high-speed, high-performance analog circuits. The process achieves three times the speed of earlier processes.
Other advantages of the technology for high-speed analog design are: very low voltage coefficient of metal-insulator-metal (MIM) capacitors, excellent resistor matching (0.1%), and dielectric insulation (DI), also known as silicon-on-insulator (SOI). The process technology reduces parasitic capacitance and produces a very high transistor current and gain early voltage product (β×VA) for increased linearity.
One example of the advanced performance of the BiCom-III process is the THS4304. It is the first unity-gain stable 3GHz voltage feedback op amp. It is designed for use in high-performance, high-speed analog signal processing chains and operates from a single +5V supply.
The THS4304 offers 3GHz -3dB unity-gain bandwidth, 830V/μs slew rate, +45dBm third-order output intercept (OIP ₃ )@20MHz, 2.8nV/√Hz input noise, and 7.5ns settling to 0.01% while consuming only 90mW of quiescent power.
To understand the unique performance of the THS4304, compare it to the premier ±5V op amps shown in Figure 4. Competitor X internally compensates for gains as small as +2V/V and is considered by many designers to be one of the lowest distortion ±5V op amps available.
This graph shows the 2nd and 3rd order harmonic distortion (HD2 & HD3) performance of the THS4304 operating at 5V and competing parts operating at ±5V. Each amplifier has a gain of +2V/V, delivering 2Vp-p into a 100Ω load. Note that although the THS4304 is compensated for unity gain (G=+1V/V) and requires more compensation than if G=+2V/V, it still has excellent distortion performance at half the supply voltage.

Conclusion
New process technologies are driving the integration of high-performance components for cellular base stations. This driving force, combined with advances in topology and innovative design solutions such as quadrature modulators and demodulators and PA linearization techniques, will reduce cost, lower power requirements, reduce size, and improve reliability, making future base stations smaller in size. Process technology still has a long way to go to integrate all digital and analog functions on a single device, and even longer to achieve this goal at a low cost.

About the author:
James Karki is a high-speed amplifier and RF strategic marketing manager and a member of the laboratory research group at Texas Instruments. He has more than 26 years of experience in analog and digital electronics and has worked in amplifier applications and new product definition at TI for the past seven years. He graduated with a BSEE degree from the University of Washington in Seattle, Washington.