Read Turing's Electronics and Electrical Engineering Series and appreciate three types of ADC circuits

se7ens

Read Turing's Electronics and Electrical Engineering Series and appreciate three types of ADC circuits [Copy link]

RT

In the original article, in section 4.2, the author mentioned that ADC cannot do without DAC.

The ADC composed of DAC and comparator is proposed as shown in the figure below.

If you use the DAC output value to compare the input signal value one by one, you should eventually get a DAC value that is close to the input value (usually not exactly equal).

Of course, one-by-one comparison is definitely not a good method. Usually, the method of taking the middle value is used to quickly get the DAC with an approximate input value. This is the so-called successive approximation method.

Then the usual ADC implementation method is as follows

The first method is the ladder circuit method.

This very intuitive method is to compare the quantized DAC input with the input signal, and the final approximate DAC result is the ADC conversion result of the input signal.

Assuming that the resistance value of the resistors connected in series in the vertical direction is R, it is not difficult to calculate the value of the resistor connected in series at each Di input terminal:

Of course, the disadvantages of this circuit are also obvious: it requires too many DAC input ports. Imagine if it were 10-bit or 12-bit, then it would be very painful to select the device.

To solve this problem, the following two implementation methods are more clever.

The second method, PWM ramp method, simulates different reference inputs according to different PWM duty cycles. When the comparator flips, the corresponding duty cycle is the proportion of the corresponding full-scale range of the input signal;

The third method, the step response method, is similar to the second method. It calculates the amplitude of the input signal based on the time of the RC circuit. It is worth noting that this time conversion is not linear and there may be a large error.

The above is a brief summary of the ADC part. Although I have learned some knowledge about ADC before, the explanation in this book makes me understand ADC more deeply and thoroughly.

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maychang

[The following two implementation methods are more clever]

In terms of ingenuity, these two methods are not as good as the dual-integral ADC circuit. Typical dual-integral ADC chips include ICL7107 and ICL7135.

se7ens

maychang posted on 2024-8-9 16:48 [The latter two implementation methods are more clever] Speaking of cleverness, these two methods are not as good as the dual-integral ADC circuit. Dual-integral ADC typical core...

Thanks for the tip. I will study the ADC you mentioned later.

maychang

se7ens posted on 2024-8-9 18:20 Thanks for the tip, I will study the ADC you mentioned later

In the second circuit mentioned in the first post, the change of the value of the resistor R, the change of the value of the capacitor C, the change of the PWM frequency... will affect the conversion result, and the same is true for the third circuit. The advantage of double-integral AD is that this conversion method requires a clock, but the clock frequency does not need to be accurate. It also uses resistors and capacitors, but the change of the resistor and capacitor values does not affect the AD conversion result. It only requires that the clock frequency and the resistor and capacitor values do not change during an AD conversion process (less than 0.1 seconds).

gmchen

Now more ADC is used

se7ens

maychang posted on 2024-8-9 18:34 In the second circuit mentioned in the first post, the value change of the resistor R, the value change of the capacitor C, the frequency change of PWM...will affect the conversion...

I found some information online and found that this design is much more complicated.

The integration time of the capacitor is used to measure the input voltage and the reference voltage.

The relationship between the final input voltage and the reference voltage is as follows

T1 is the first integration time, which is the time for all counter states to flip once 2^n*Tc

T2 is the second integration time, which is the time when -Vref is discharged through RC to make Vo equal to 0.

If Vref is set to 2^n, then the counter counts ( ) during T2, which is the input voltage.

This idea is amazing

高级灰0090

Thanks to the author for sharing selflessly. Very exciting content, I learned a lot and benefited a lot. Thank you very much.