This time, let's try to use such a small board to drive a 0.96-inch OLED and see the effect.
1. Preparation
hardware:
0.96-inch OLED screen;
Dupont wire;
software:
Download the official OLED reference code
OLED_1in5_Code.7z_Free high-speed download|Baidu Netdisk-Share without restrictions (baidu.com)
SPI/I2C driving OLED (C) | LUCKFOX WIKI References
2. Determine the connection pins
As shown in the following table
Since the pins of the development board are identified by pin numbers, the corresponding relationship between the GPIOn_Xn number and the pin number on the development board is as follows:
pin = bank * 32 + (group * 8 + n); bank is because the chip is divided into several bank areas, for example, GPIO1_C6:
GPIO1 corresponds to bank1; C corresponds to group, which is group 2, and 6 is the 7th pin in group 2;
That is: GPIO1_C6 corresponds to pin = 1 * 32 + 2 * 8 + 6 = 54
|
0.96inch OLED Module |
Luckfox Pico Pinout |
Function |
|
VCC |
3V3 |
power input |
|
GND |
GND |
Power Ground |
|
D1 |
GPIO1-C2 -----SPI0_MOSI(50) |
Master output/slave input |
|
D0 |
GPIO1-C1------SPI0_CLK(48) |
SPI clock signal |
|
CS |
GPIO1_C7(55) |
Chip Select |
|
DC |
GPIO1_C6(54) |
Data/Command Selection |
|
RST |
GPIO1_C4(52) |
Reset |
3. Modify SDK
Enter the /sysdrv/source/kernel/arch/arm/boot/dts/ directory
Operation as shown in the figure
1. Add GPIO pin configuration in rv1103g-luckfox-pico.dts and add pin
2. Confirm whether SPI0 is enabled and add pinctrl of SPI 0
The configured DTS is as follows:
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*/
/dts-v1/;
#include "rv1103.dtsi"
#include "rv1106-evb.dtsi"
#include "rv1103-luckfox-pico-ipc.dtsi"
/ {
model = "Luckfox Pico";
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103";
gpio1pc6:gpio1pc6 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&gpio1_pc6>;
regulator-name = "gpio1_pc6";
regulator-always-on;
};
gpio1pc4:gpio1pc4 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&gpio1_pc4>;
regulator-name = "gpio1_pc4";
regulator-always-on;
};
gpio1pc7:gpio1pc7 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&gpio1_pc7>;
regulator-name = "gpio1_pc7";
regulator-always-on;
};
gpio4pa2:gpio4pa2 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&gpio4_pa2>;
regulator-name = "gpio4_pa2";
regulator-always-on;
};
gpio4pa3:gpio4pa3 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&gpio4_pa3>;
regulator-name = "gpio4_pa3";
regulator-always-on;
};
gpio4pa4:gpio4pa4 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&gpio4_pa4>;
regulator-name = "gpio4_pa4";
regulator-always-on;
};
gpio4pa6:gpio4pa6 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&gpio4_pa6>;
regulator-name = "gpio4_pa6";
regulator-always-on;
};
gpio4pb0:gpio4pb0 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&gpio4_pb0>;
regulator-name = "gpio4_pb0";
regulator-always-on;
};
gpio4pb1:gpio4pb1 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&gpio4_pb1>;
regulator-name = "gpio4_pb1";
regulator-always-on;
};
};
/**********GPIO**********/
&pinctrl {
gpio1-pc6 {
gpio1_pc6:gpio1-pc6 {
rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gpio1-pc4 {
gpio1_pc4:gpio1-pc4 {
rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gpio1-pc7 {
gpio1_pc7:gpio1-pc7 {
rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gpio4-pa2 {
gpio4_pa2:gpio4-pa2 {
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gpio4-pa3 {
gpio4_pa3:gpio4-pa3 {
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gpio4-pa4 {
gpio4_pa4:gpio4-pa4 {
rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gpio4-pa6 {
gpio4_pa6:gpio4-pa6 {
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gpio4-pb0 {
gpio4_pb0:gpio4-pb0 {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gpio4-pb1 {
gpio4_pb1:gpio4-pb1 {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pinctrl {
spi0 {
/omit-if-no-ref/
spi0m0_pins: spi0m0-pins {
rockchip,pins =
/* spi0_clk_m0 */
<1 RK_PC1 4 &pcfg_pull_none>,
/* spie_miso_m0 */
/* <1 RK_PC3 6 &pcfg_pull_none>,*/
/* spi_mosi_m0 */
<1 RK_PC2 6 &pcfg_pull_none>;
};
};
};
/**********ETH**********/
&gmac {
status = "disabled";
};
/**********USB**********/
// &usbdrd {
// status = "disabled";
// };
// &usbdrd_dwc3 {
// status = "disabled";
// };
// &u2phy {
// status = "disabled";
// };
// &u2phy_otg {
// status = "disabled";
// };
/**********I2C**********/
// &i2c0 {
// status = "okay";
// pinctrl-0 = <&i2c0m2_xfer>;
// clock-frequency = <100000>;
// };
&i2c3 {
status = "okay";
pinctrl-0 = <&i2c3m1_xfer>;
clock-frequency = <100000>;
};
// /**********SPI**********/
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0m0_pins>;
cs-gpios = <&gpio1 RK_PC0 1>;
// cs-gpios = <&gpio1 26 1>;
#address-cells = <1>;
#size-cells = <0>;
spidev@0 {
compatible = "rockchip,spidev";
spi-max-frequency = <1000000000>;
reg = <0>;
};
};
// /**********UART**********/
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m1_xfer>;
};
//&uart4 {
// status = "okay";
// pinctrl-names = "default";
// pinctrl-0 = <&uart4m1_xfer>;
//};
// &uart5 {
// status = "okay";
// pinctrl-names = "default";
// pinctrl-0 = <&uart5m0_xfer>;
// };
/**********PWM**********/
&pwm0 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm0m0_pins>;
// pinctrl-0 = <&pwm0m1_pins>;
};
&pwm1 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm1m0_pins>;
// pinctrl-0 = <&pwm1m1_pins>;
};
// &pwm2 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm2m2_pins>;
// };
// &pwm3 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm3m2_pins>;
// };
// &pwm4 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm4m2_pins>;
// };
// &pwm5 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm5m2_pins>;
// };
// &pwm6 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm6m2_pins>;
// };
// &pwm7 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm7m2_pins>;
// };
// &pwm8 {
// status = "okay";
// pinctrl-names = "active";
// // pinctrl-0 = <&pwm8m1_pins>;
// pinctrl-0 = <&pwm8m0_pins>;
// };
// &pwm9 {
// status = "okay";
// pinctrl-names = "active";
// // pinctrl-0 = <&pwm9m1_pins>;
// pinctrl-0 = <&pwm9m0_pins>;
// };
&pwm10 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm10m1_pins>;
// pinctrl-0 = <&pwm10m2_pins>;
// pinctrl-0 = <&pwm10m0_pins>;
};
&pwm11 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm11m1_pins>;
// pinctrl-0 = <&pwm11m2_pins>;
// pinctrl-0 = <&pwm11m0_pins>;
};3. Compile the kernel
1) Select the corresponding board to compile
2) Start compiling
3) Kernel compilation is successful
4) Replace boot.img
Check the boot image generation time in the directory, copy it to the previously burned image file, and then burn it.
4. Modify the official OLED program;
1. Modify the DC and RST pins
1) Check the IO port number of the schematic diagram
2) Modify the DC and RST pins in DEV_Config.h
2. Compile the modified C file in the virtual machine
1) Transfer C project to the virtual machine
2) Enter the c directory and modify the compiler path in the Makefile file
3) Make directly, as shown in the figure
Generate an executable file, as shown in the figure
V. Execution
1. Transfer the entire project file to WINDOWS, and then transfer the project folder to the development board, as shown in the figure
2. Execute the application
1) Add permissions
chmod -R 777 Luckfox_Pico_OLED
2) Execution
3. Actual effect
Luckfox_Pico_OLED.zip
(174.02 KB, downloads: 4)
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