[ACM32G103RCT6 development board evaluation] + FreeRTOS system transplantation
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Learn to port the FreeRTOS system on the ACM32G103RCT6 development board.
1. Download source code
Download address: https://www.freertos.org/zh-cn-cmn-s/a00104.html
2. Add files to the project
2.1. Copy source code
Copy the system source code to the project directory, I copied it here
2.2. Add source files to the project
2.3. Add path
2.4、FreeRTOSConfig.h
/*
* FreeRTOS V202212.01
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
/* Ensure definitions are only used by the compiler, and not by the assembler. */
#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
#include <stdint.h>
extern uint32_t SystemCoreClock;
#endif
#define configUSE_PREEMPTION 1
#define configSUPPORT_STATIC_ALLOCATION 0//1
#define configSUPPORT_DYNAMIC_ALLOCATION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ 120000000//( SystemCoreClock )
#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )
#define configMAX_PRIORITIES ( 56 )
#define configMINIMAL_STACK_SIZE ( ( uint16_t ) 512 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) 15 * 1024 )
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
#define configUSE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 8
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_COUNTING_SEMAPHORES 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
#define configUSE_MALLOC_FAILED_HOOK 0//1
#define configCHECK_FOR_STACK_OVERFLOW 0//2
/* Defaults to size_t for backward compatibility, but can be changed
* if lengths will always be less than the number of bytes in a size_t. */
#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
/* Software timer definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY ( 2 )
#define configTIMER_QUEUE_LENGTH 10
#define configTIMER_TASK_STACK_DEPTH 256
/* Set the following definitions to 1 to include the API function, or zero
* to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 1
#define INCLUDE_xTimerPendFunctionCall 1
#define INCLUDE_xQueueGetMutexHolder 1
#define INCLUDE_uxTaskGetStackHighWaterMark 1
#define INCLUDE_eTaskGetState 1
/* Cortex-M specific definitions. */
#ifdef __NVIC_PRIO_BITS
/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
#define configPRIO_BITS __NVIC_PRIO_BITS
#else
#define configPRIO_BITS 4
#endif
/* The lowest interrupt priority that can be used in a call to a "set priority"
* function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
/* The highest interrupt priority that can be used by any interrupt service
* routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT
* CALL INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A
* HIGHER PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
/* Interrupt priorities used by the kernel port layer itself. These are generic
* to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << ( 8 - configPRIO_BITS ) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << ( 8 - configPRIO_BITS ) )
/* Normal assert() semantics without relying on the provision of an assert.h
* header file. */
#define configASSERT( x ) if ( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
* standard names. */
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler
//#define xPortSysTickHandler SysTick_Handler
/* Allow system call from within FreeRTOS kernel only. */
#define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 1
/* STM32H743 has 16 MPU regions and therefore it is necessary to configure
* configTOTAL_MPU_REGIONS correctly. */
#define configTOTAL_MPU_REGIONS 16
/* The default TEX,S,C,B setting marks the SRAM as shareable and as a result,
* disables cache. Do not mark the SRAM as shareable because caching is being
* used. TEX=0, S=0, C=1, B=1. */
#define configTEX_S_C_B_SRAM ( 0x03UL )
#endif /* FREERTOS_CONFIG_H */
2.5. Modify acm32g103_it.c
/******************************************************************************
*[url=home.php?mod=space&uid=1307177]@File[/url] : acm32g103_it.c
*[url=home.php?mod=space&uid=159083]@brief[/url] : Main Interrupt Service Routines
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************/
#include "main.h"
#include "acm32g103_it.h"
extern TIM_HandleTypeDef tim2_handler;
extern void xPortSysTickHandler(void);
void NMI_Handler(void)
{
}
void HardFault_Handler(void)
{
while (1)
{
}
}
void MemManage_Handler(void)
{
while (1)
{
}
}
void BusFault_Handler(void)
{
while (1)
{
}
}
void UsageFault_Handler(void)
{
while (1)
{
}
}
//void SVC_Handler(void)
//{
//}
void DebugMon_Handler(void)
{
}
//void PendSV_Handler(void)
//{
//}
/******************************************************************************
*@brief : System tick handler
*@param : none
*@return: none
******************************************************************************/
void SysTick_Handler(void)
{
HAL_IncTick();
if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED)
{
xPortSysTickHandler();
}
}
//void EXTI0_IRQHandler(void)
//{
// HAL_EXTI_IRQHandler(GPIO_PIN_0);
//}
//void EXTI1_IRQHandler(void)
//{
// HAL_EXTI_IRQHandler(GPIO_PIN_1);
//}
//void EXTI2_IRQHandler(void)
//{
// HAL_EXTI_IRQHandler(GPIO_PIN_2);
//}
//void EXTI3_IRQHandler(void)
//{
// HAL_EXTI_IRQHandler(GPIO_PIN_3);
//}
//void EXTI4_IRQHandler(void)
//{
// HAL_EXTI_IRQHandler(GPIO_PIN_4);
//}
//void EXTI9_5_IRQHandler(void)
//{
// HAL_EXTI_IRQHandler(GPIO_PIN_5);
// HAL_EXTI_IRQHandler(GPIO_PIN_6);
// HAL_EXTI_IRQHandler(GPIO_PIN_7);
// HAL_EXTI_IRQHandler(GPIO_PIN_8);
// HAL_EXTI_IRQHandler(GPIO_PIN_9);
//}
//void EXTI15_10_IRQHandler(void)
//{
// HAL_EXTI_IRQHandler(GPIO_PIN_10);
// HAL_EXTI_IRQHandler(GPIO_PIN_11);
// HAL_EXTI_IRQHandler(GPIO_PIN_12);
// HAL_EXTI_IRQHandler(GPIO_PIN_13);
// HAL_EXTI_IRQHandler(GPIO_PIN_14);
// HAL_EXTI_IRQHandler(GPIO_PIN_15);
//}
void TIM2_IRQHandler(void)
{
HAL_TIM_IRQHandler(&tim2_handler);
}
2.6、fun_task.c
#include "main.h"
#define START_TASK_PRO 1
#define START_STK_SIZE 128
TaskHandle_t StartTask_Handler;
#define TASK1_PRIO 4
#define TASK1_STK_SIZE 128
static TaskHandle_t Task1Task_Handler = NULL;
#define TASK2_PRIO 3
#define TASK2_STK_SIZE 128
static TaskHandle_t Task2Task_Handler = NULL;
void start_task(void *pvParameters);
void gui_task(void *pvParameters);
void task1(void *pvParameters);
void task2(void *pvParameters);
void task_create(void)
{
//start_task
xTaskCreate((TaskFunction_t )start_task,
(const char* )"start_task",
(uint16_t )START_STK_SIZE,
(void* )NULL,
(UBaseType_t )START_TASK_PRO,
(TaskHandle_t* )&StartTask_Handler);
vTaskStartScheduler();
}
void start_task(void *pvParameters)
{
taskENTER_CRITICAL();
//task1
xTaskCreate((TaskFunction_t )task1,
(const char* )"task1",
(uint16_t )TASK1_STK_SIZE,
(void* )NULL,
(UBaseType_t )TASK1_PRIO,
(TaskHandle_t* )&Task1Task_Handler);
//task2
xTaskCreate((TaskFunction_t )task2,
(const char* )"task2",
(uint16_t )TASK2_STK_SIZE,
(void* )NULL,
(UBaseType_t )TASK2_PRIO,
(TaskHandle_t* )&Task2Task_Handler);
taskEXIT_CRITICAL();
vTaskDelete(StartTask_Handler);
}
//task1
void task1(void *pvParameters)
{
while (1)
{
printf("task1 run ...\r\n");
vTaskDelay(200);
}
}
//task2
void task2(void *pvParameters)
{
while (1)
{
printf("task2 run ...\r\n");
vTaskDelay(100);
}
}
2.7、main.c
#include "main.h"
int main(void)
{
HAL_Init();
SystemClock_Config();
usart_init(115200);
printf("\r\n\r\n====== ACM32G103 MCU is runing ======\r\nSysCoreClk: %dHz, HCLK:%dHz\r\nPCLK1:%dHz, PCLK2:%dHz\r\n\r\n",g_SystemCoreClock, HAL_RCC_GetHCLKFreq(),HAL_RCC_GetPCLK1Freq(),HAL_RCC_GetPCLK2Freq());
init_led();
init_tim2();
init_key();
task_create();
while(1)
{
}
}
3. Program running
Download the program to the development board, reset the development board, and the serial port outputs
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