The eight major losses of switching power supplies are described in great detail!
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Energy conversion systems inevitably have energy losses. Although 100% conversion efficiency cannot be achieved in practical applications, a high-quality power supply can achieve very high efficiency levels, approaching 95%. The operating efficiency of most power supply ICs can be measured under specific operating conditions, and these parameters are given in the data sheet. Generally, manufacturers will provide actual measured results, but we can only guarantee our own data. Figure 1 shows an example circuit of an SMPS buck converter, which can achieve a conversion efficiency of 97%, even at light loads. What is the secret to achieve such high efficiency? It is best to start by understanding the common problem of SMPS losses. Most of the losses in switching power supplies come from the switching devices (MOSFETs and diodes), and a small part of the losses come from inductors and capacitors. However, if very cheap inductors and capacitors (with high resistance) are used, the losses will increase significantly. When selecting an IC, it is necessary to consider the architecture and internal components of the controller in order to obtain high efficiency indicators. For example, Figure 1 uses a variety of methods to reduce losses, including: synchronous rectification, low on-resistance MOSFETs integrated inside the chip, low quiescent current and pulse skipping control mode. We will discuss the benefits of these measures in this article.
Buck SMPS
Losses are a problem faced by any SMPS architecture. Here we take the step-down (or buck) converter shown in Figure 2 as an example for discussion. The switching waveforms at various points are marked in the figure for subsequent calculations.
The main function of a buck converter is to convert a higher DC input voltage into a lower DC output voltage. To achieve this requirement, the MOSFET is turned on and off at a fixed frequency (fS) under the control of a pulse width modulation signal (PWM). When the MOSFET is turned on, the input voltage charges the inductor and capacitor (L and COUT), through which energy is transferred to the load. During this period, the inductor current rises linearly, and the current loop is shown as loop 1 in Figure 2.
When the MOSFET is turned off, the input voltage is disconnected from the inductor, and the inductor and output capacitor supply power to the load. The inductor current decreases linearly and flows through the diode, and the current loop is shown as loop 2 in the figure. The on-time of the MOSFET is defined as the duty cycle (D) of the PWM signal. D divides each switching cycle into two parts: [D × tS] and [(1 - D) × tS], which correspond to the on-time of the MOSFET (loop 1) and the on-time of the diode (loop 2), respectively. All SMPS topologies (buck, inverting, etc.) use this method to divide the switching cycle to achieve voltage conversion.
For the buck converter circuit, a larger duty cycle will transfer more energy to the load and increase the average output voltage. On the contrary, when the duty cycle is low, the average output voltage will also decrease. Based on this relationship, the following ideal conversion formula for the buck SMPS can be obtained (without considering the voltage drop of the diode or MOSFET):
VOUT = D × VIN
IIN = D × IOUT
It is important to note that the longer any SMPS is in one state during a switching cycle, the greater the losses it incurs in that state. For a buck converter, the lower D (and correspondingly lower VOUT) the greater the losses in loop 2.
The MOSFET and diode in Figure 2 (and most other DC-DC converter topologies) are the main contributors to power dissipation. The associated losses are mainly divided into two parts: conduction losses and switching losses.
MOSFET and diode are switching elements that allow current to flow through the circuit when they are turned on. When the device is turned on, the conduction loss is determined by the on-resistance (RDS(ON)) of the MOSFET and the forward voltage of the diode, respectively.
The conduction loss of the MOSFET (PCOND(MOSFET)) is approximately equal to the product of the on-resistance RDS(ON), the duty cycle (D), and the average current of the MOSFET when it is on (IMOSFET(AVG)).
PCOND(MOSFET) (average current used) = IMOSFET(AVG) × RDS(ON) × D
The above formula gives an approximation of the MOSFET conduction losses in an SMPS, but it is only an estimate of the circuit losses because the power dissipation generated when the current rises linearly is greater than the power dissipation calculated from the average current. For "peak" currents, a more accurate calculation method is to integrate the square of the current waveform between the peak and valley values (IV and IP in Figure 3) to get an estimate.
The following equation gives a more accurate way to estimate the losses, replacing the simple I term with the integral of the current waveform I between IP and IV.
PCOND(MOSFET) = [(IP3 - IV3)/3] × RDS(ON) × D
= [(IP3 - IV3)/3] × RDS(ON) × VOUT/VIN
Where IP and IV correspond to the peak and valley values of the current waveform, respectively, as shown in Figure 3. The MOSFET current rises linearly from IV to IP. For example, if IV is 0.25A, IP is 1.75A, RDS(ON) is 0.1Ω, and VOUT is VIN/2 (D = 0.5), the calculation result based on the average current (1A) is:
PCOND(MOSFET) (using average current) = 12 × 0.1 × 0.5 = 0.050W
More accurate calculations using waveform integration:
PCOND(MOSFET) (calculated using the integration of the current waveform) = [(1.753 - 0.253)/3] × 0.1 × 0.5 = 0.089W
Or approximately 78%, which is higher than the result obtained by calculating the average current. For current waveforms with relatively small peak-to-average ratios, the difference between the two calculation results is very small, and the average current calculation can meet the requirements.
The conduction loss of a MOSFET is proportional to RDS(ON), while the conduction loss of a diode is highly dependent on the forward voltage (VF). Diodes generally have greater losses than MOSFETs, and diode losses are proportional to forward current, VF, and conduction time. Since the diode conducts when the MOSFET is off, the conduction loss of the diode (PCOND(DIODE)) is approximately:
PCOND(DIODE) = IDIODE(ON) × VF × (1 - D)
Where IDIODE(ON) is the average current during the diode conduction period. As shown in Figure 2, the average current during the diode conduction period is IOUT, so for a buck converter, PCOND(DIODE) can be estimated as follows:
PCOND(DIODE) = IOUT × VF × (1 - VOUT/VIN)
Unlike MOSFET power dissipation calculations, using average current gives a more accurate power dissipation calculation because diode losses are proportional to I, not I2.
Obviously, the longer the MOSFET or diode is on, the greater the conduction losses. For a buck converter, the lower the output voltage, the greater the power dissipation in the diode, since it is in the on state longer.
Since the switching loss is caused by the non-ideal state of the switch, it is difficult to estimate the switching loss of MOSFET and diode. It takes a certain amount of time for the device to switch from fully on to fully off or from fully off to fully on, and power loss will be generated in this process. The relationship between the drain-source voltage (VDS) and the drain-source current (IDS) of the MOSFET shown in Figure 4 can well explain the switching loss of the MOSFET during the transition process. It can be seen from the waveform in the upper half that the voltage and current transiently change during tSW(ON) and tSW(OFF), and the capacitance of the MOSFET is charged and discharged.
As shown in Figure 4, the full load current (ID) flows through the MOSFET before VDS drops to the final on-state (= ID × RDS(ON)). Conversely, when turning off, VDS gradually rises to the final value of the off-state before the MOSFET current drops to zero. The overlap of voltage and current during the switching process is the source of switching losses, which can be clearly seen in Figure 4.
Figure 4. Switching losses occur during the transition between the on and off phases of the MOSFET.
It is easy to understand that switching losses increase with the increase of SMPS frequency. As the switching frequency increases (the cycle shortens), the proportion of switching transition time increases, thereby increasing switching losses. During the switching conversion process, the impact of switching time of one twentieth of the duty cycle on efficiency is much less than the case where the switching time is one tenth of the duty cycle. Since switching losses are closely related to frequency, switching losses will become the main loss factor when working at high frequencies. The switching losses of MOSFET (PSW(MOSFET)) can be estimated according to the triangle wave shown in Figure 3, and the formula is as follows:
PSW(MOSFET) = 0.5 × VD × ID × (tSW(ON) + tSW(OFF)) × fS
Where VD is the drain-source voltage during the MOSFET off period, ID is the channel current during the MOSFET on period, tSW(ON) and tSW(OFF) are the on and off times. For the buck circuit conversion, VIN is the voltage when the MOSFET is off, and the current when it is on is IOUT.
To verify the switching and conduction losses of the MOSFET, typical waveforms of the integrated high-side MOSFET in a buck converter are shown in Figure 5: VDS and IDS. The circuit parameters are: VIN = 10V, VOUT = 3.3V, IOUT = 500mA, RDS(ON) = 0.1Ω, fS = 1MHz, and the switching transient time (tON + tOFF) is 38ns in total.
As can be seen in Figure 5, the switching change is not instantaneous, and the overlap of the current and voltage waveforms causes power loss. When the MOSFET is "on" (Figure 2), the current IDS flowing through the inductor rises linearly, and the switching loss at the turn-off time is greater than that at the turn-on edge.
Using the above approximation, the average loss of the MOSFET can be calculated as follows:
PT(MOSFET) = PCOND(MOSFET) + PSW(MOSFET)
= [(I13 - I03)/3] × RDS(ON) × VOUT/VIN + 0.5 × VIN × IOUT × (tSW(ON) + tSW(OFF)) × fS
= [(13 - 03)/3] × 0.1 × 3.3/10 + 0.5 × 10 × 0.5 × (38 × 10-9) × 1 × 106
= 0.011 + 0.095 = 106mW
This result is close to the 117.4mW measured in the lower curve of Figure 5. Note that in this case, fS is high enough that PSW (MOSFET) is the dominant factor in power dissipation.
Figure 5. Typical switching cycle of the high-side MOSFET of a buck converter, 10V input, 3.3V output (output current 500mA). The switching frequency is 1MHz, and the switching transition time is 38ns.
Like MOSFET, diodes also have switching losses. This loss is largely determined by the reverse recovery time (tRR) of the diode. The diode switching loss occurs when the diode switches from forward conduction to reverse cutoff.
When a reverse voltage is applied to both ends of the diode, the accumulated charge generated by the forward current on the diode needs to be released, resulting in a reverse current spike (IRR(PEAK)) with a polarity opposite to the forward current, which causes V × I power loss because the reverse voltage and reverse current exist simultaneously in the diode during the reverse recovery period. Figure 6 shows a schematic diagram of the PN junction of the diode during the reverse recovery period.
Figure 6. When the diode junction is reverse biased, the accumulated charge during the forward conduction period needs to be released, resulting in a peak current (IRR(PEAK)).
Knowing the reverse recovery characteristics of the diode, the switching loss of the diode (PSW(DIODE)) can be estimated by the following formula:
PSW(DIODE) = 0.5 × VREVERSE × IRR(PEAK) × tRR2 × fS
Where VREVERSE is the reverse bias voltage of the diode, IRR(PEAK) is the peak value of the reverse recovery current, and tRR2 is the time from the reverse current peak IRR to the recovery current becoming positive. For a buck circuit, when the MOSFET is turned on, VIN is the reverse bias voltage of the diode when the MOSFET is turned on.
To verify the diode loss calculation formula, Figure 7 shows the switching waveform of the PN junction in a typical buck converter, VIN = 10V, VOUT = 3.3V, IRR(PEAK) = 250mA, IOUT = 500mA, fS = 1MHz, tRR2 = 28ns, VF = 0.9V. Using these values, we can get:
This result is close to the measured result of 358.7mW shown in Figure 7. Considering the large VF and long diode conduction period, the tRR time is very short and the switching loss (PSW(DIODE)) dominates the diode loss.
Figure 7. Switching waveforms of a PN junction switching diode in a buck converter, stepping down from 10V input to 3.3V output with an output current of 500mA. Other parameters include: fS of 1MHz, tRR2 of 28ns, VF = 0.9V
Improve efficiency
Based on the above discussion, what are the ways to reduce the switching loss of the power supply? The direct way is to choose a MOSFET with low on-resistance RDS(ON) and fast switching; and a diode with low on-voltage drop VF and fast recovery.
There are several factors that directly affect the on-resistance of MOSFETs. Generally, increasing the chip size and drain-source breakdown voltage (VBR(DSS)) helps to reduce the on-resistance RDS(ON) due to the increase in semiconductor material in the device. On the other hand, larger MOSFETs increase switching losses. Therefore, although large-size MOSFETs reduce RDS(ON), they also cause efficiency problems that can be avoided with small devices. When the die temperature increases, the on-resistance of the MOSFET increases accordingly. The junction temperature must be kept low so that the on-resistance RDS(ON) is not too large. The on-resistance RDS(ON) is inversely proportional to the gate-source bias voltage. Therefore, it is recommended to use a sufficiently large gate voltage to reduce RDS(ON) losses, but this will also increase gate drive losses. It is necessary to balance the benefits of reducing RDS(ON) and the defects of increasing gate drive. The switching losses of MOSFETs are related to the device capacitance. Larger capacitance requires a longer charging time, which slows down the switching and consumes more energy. Miller capacitance is usually defined in MOSFET data sheets as reverse transfer capacitance (CRSS) or gate-drain capacitance (CGD), and plays a decisive role in switching time during the switching process. The charge of the Miller capacitance is represented by QGD. In order to switch the MOSFET quickly, the Miller capacitance is required to be as low as possible. In general, the capacitance of the MOSFET is inversely proportional to the chip size, so a compromise must be considered between switching losses and conduction losses, and the switching frequency of the circuit must also be carefully selected. For diodes, the on-state voltage drop must be reduced to reduce the resulting losses. For small-sized, low-rated silicon diodes, the on-state voltage drop is generally between 0.7V and 1.5V. The size, process and voltage rating of the diode will affect the on-state voltage drop and reverse recovery time. Large-sized diodes usually have higher VF and tRR, which will cause relatively large losses. Switching diodes are generally divided into "high-speed", "very high-speed" and "ultra-high-speed" diodes based on speed, and the reverse recovery time decreases with increasing speed. Fast recovery diodes have tRR of hundreds of nanoseconds, while ultra-fast recovery diodes have tRR of tens of nanoseconds. In low-power applications, an alternative to fast-recovery diodes is the Schottky diode, which has a negligible recovery time and a reverse recovery voltage VF of only half that of fast-recovery diodes (0.4V to 1V). However, the rated voltage and current of the Schottky diode are much lower than those of the fast-recovery diode, and it cannot be used in high-voltage or high-power applications. In addition, the Schottky diode has a higher reverse leakage current than the silicon diode, but these factors do not limit its application in many power supplies. However, in some low-voltage applications, even the Schottky diode with a lower voltage drop has unacceptable conduction losses. For example, in a circuit with an output of 1.5V, even if a Schottky diode with a 0.5V conduction voltage drop VF is used, a 33% output voltage loss will occur when the diode is turned on! To solve this problem, a MOSFET with a low on-resistance RDS(ON) can be selected to implement a synchronous control architecture. The diode is replaced with a MOSFET (compare the circuits of Figures 1 and 2), which works synchronously with the main MOSFET of the power supply, so that only one is guaranteed to be turned on during the alternating switching process. The conducting diode is replaced by the conducting MOSFET, and the high conduction voltage drop VF of the diode is converted into the low conduction voltage drop of the MOSFET (MOSFET RDS(ON) × I), which effectively reduces the conduction loss of the diode. Of course, synchronous rectification only reduces the voltage drop of the MOSFET compared to the diode. On the other hand, the power consumption of driving the synchronous rectification MOSFET cannot be ignored. IC data sheet The above discusses two important factors that affect the efficiency of switching power supplies (MOSFET and diode). Looking back at the buck circuit shown in Figure 1, the main factors that affect the working efficiency of the controller IC can be obtained from the data sheet. First, the switching element is integrated inside the IC, which can save space and reduce parasitic losses. Second, using a MOSFET with low on-resistance RDS(ON), in a small-size integrated buck IC (such as MAX1556), the on-resistance of its NMOS and PMOS can reach 0.27Ω (typical value) and 0.19Ω (typical value). Finally, the synchronous rectification circuit used. For a 500mA load, a 50% duty cycle switching circuit can reduce the loss of the low-side switch (or diode) from 225mW (assuming a 1V diode drop) to 34mW. Proper selection of SMPS IC Proper selection of SMPS IC packaging, control architecture, and reasonable design can effectively improve conversion efficiency.
When the power switch is integrated into the IC, the cumbersome MOSFET or diode selection can be eliminated, and the circuit can be made more compact. Due to the reduction of line loss and parasitic effects, the efficiency can be improved to a certain extent. According to the power level and voltage limit, the MOSFET, diode (or synchronous rectification MOSFET) can be integrated into the chip. Another benefit of integrating the switch into the chip is that the size of the gate drive circuit has been optimized for the on-chip MOSFET, so there is no need to waste time on unknown discrete MOSFETs.
Quiescent Current
Battery-powered devices pay special attention to the quiescent current (IQ) in the IC specification, which is the current required to maintain circuit operation. Under heavy load conditions (greater than ten or a hundred times the quiescent current IQ), the effect of IQ on efficiency is not obvious because the load current is much greater than IQ. As the load current decreases, the efficiency tends to decrease because the power corresponding to IQ accounts for a higher proportion of the total power. This is especially important for applications that are in sleep mode or other low-power modes most of the time. Many consumer products need to maintain power for keyboard scanning or other functions even when they are "off". At this time, it is undoubtedly necessary to choose a power supply with extremely low IQ.
Power architecture improves efficiency
The control architecture of SMPS is one of the key factors affecting the efficiency of switching power supplies. We have already discussed this in the synchronous rectification architecture. Since the low on-resistance MOSFET is used to replace the switching diode with large power consumption, the efficiency index can be effectively improved.
Another important control architecture is designed for light load operation or a wide load range, namely pulse skipping mode, also known as pulse frequency modulation (PFM). Unlike simple PWM switching operation (using a fixed switching frequency at both heavy and light loads), the converter in pulse skipping mode operates in skipping switching cycles, which can save unnecessary switching operations and thus improve efficiency.
In pulse skipping mode, the inductor is discharged over a longer period of time, transferring energy from the inductor to the load to maintain the output voltage. Of course, as the load absorbs current, the output voltage will also drop. When the voltage drops to the set threshold, a new switching cycle will be started to charge the inductor and replenish the output voltage.
It should be noted that pulse skipping mode will generate load-dependent output noise, which is difficult to filter out because it is distributed at different frequencies (unlike the fixed-frequency PWM control architecture).
Advanced SMPS ICs take advantage of both: constant PWM frequency at heavy loads and pulse skipping mode at light loads to improve efficiency. The IC shown in Figure 1 provides such an operating mode.
When the load increases to a higher effective value, the pulse skipping waveform will switch to fixed PWM, and the noise is easily filtered at nominal load. Throughout the operating range, the device selects pulse skipping mode and PWM mode as needed to maintain the overall highest efficiency (Figure 8).
The efficiency curves shown in curves D, E, and F in Figure 8 show low efficiency at light loads in fixed PWM mode, but can provide high conversion efficiency (up to 98%) at heavy loads. If the IC is set to maintain fixed PWM operation mode at light loads, it will not change the operation mode according to the load conditions. In this case, the ripple can be kept at a fixed frequency, but a certain amount of power is wasted. At heavy loads, the additional power required to maintain PWM switching operation is very small and far less than the output power. On the other hand, the efficiency curves in pulse skipping "idle" mode (A, B, and C in Figure 8) can remain at a high level at light loads because the switch is only turned on when the load needs it. For the 7V input curve, an efficiency of more than 60% can be obtained in idle mode with a 1mA load.
Figure 8. Buck converter efficiency curves in PWM and idle (pulse skipping) modes. Note that at light loads, the efficiency in idle mode is higher than that in PWM mode.
Optimizing SMPS
Switching power supplies are widely used due to their high efficiency indicators, but their efficiency is still restricted by some inherent losses in SMPS circuits. When designing a switching power supply, it is necessary to carefully study the sources of SMPS losses and reasonably select SMPS ICs to fully utilize the advantages of the device. In order to obtain an efficient SMPS while keeping the circuit cost as low as possible, or even without increasing the circuit cost, engineers need to make comprehensive choices.
We have seen that MOSFETs and diodes contribute to SMPS losses. Using high-quality switching devices can greatly improve efficiency, but they are not the only components that can optimize power supply efficiency.
Figure 1 details the basic circuit of a typical buck converter IC. Two synchronous rectifier MOSFETs are integrated, and low RDS(ON) MOSFETs are very efficient. In this circuit, the switching elements are integrated inside the IC, and the components have been pre-selected for the specific application. However, to further improve efficiency, designers also need to pay attention to passive components—external inductors and capacitors—and understand their impact on power consumption.
The power consumption of an inductor includes two basic factors: coil loss and core loss. The coil loss is attributed to the DC resistance (DCR) of the coil, and the core loss is attributed to the magnetic characteristics of the inductor.
DCR is defined as the following resistance formula:
Where ρ is the resistivity of the coil material, l is the coil length, and A is the cross-sectional area of the coil.
DCR will increase with the increase of coil length and decrease with the increase of coil cross-sectional area. This principle can be used to judge standard inductors and determine the required different inductance values and sizes. For a fixed inductance value, when the inductor size is small, the cross-sectional area of the coil must be reduced in order to maintain the same number of turns, thus resulting in an increase in DCR; for a given inductor size, a small inductance value usually corresponds to a small DCR, because fewer turns reduce the coil length and a thicker wire can be used.
Knowing the DCR and the average inductor current (which depends on the SMPS topology), the inductor resistive losses (PL(DCR)) can be estimated as follows:
PL(DCR) = LAVG2 × DCR
Here, IL(AVG) is the average DC current flowing through the inductor. For a buck converter, the average inductor current is the DC output current. Although the size of the DCR directly affects the power dissipation in the inductor resistance, which is proportional to the square of the inductor current, it is necessary to reduce the DCR.
In addition, it is also important to note that when using the average current of the inductor to calculate PL (DCR) (as shown in the above formula), the result is slightly lower than the actual loss because the actual inductor current is a triangular wave. In the calculation of MOSFET conduction loss introduced earlier in this article, a more accurate result can be obtained by integrating the waveform of the inductor current. A more accurate and of course more complex calculation formula is as follows:
PL(DCR) = (IP3 - IV3)/3 × DCR
Where IP and IV are the peak and valley values of the inductor current waveform.
Core loss is not as easy to estimate as conduction loss and is difficult to estimate. It consists of hysteresis and eddy current losses, which directly affect the alternating flux of the core. In SMPS, although the average DC current flows through the inductor, the ripple current generated by the change of the switching voltage through the inductor causes the periodic flux change of the core.
Hysteresis loss originates from the power consumed by the rearrangement of the core dipoles in each AC cycle. It can be regarded as the "friction" loss caused by the dipoles rubbing against each other when the polarity of the magnetic field changes, which is proportional to the frequency and flux density.
In contrast, eddy current losses are introduced by the time-varying magnetic flux in the core. From Faraday's law, we know that alternating magnetic flux produces alternating voltage. Therefore, this alternating voltage will generate local currents, resulting in I2R losses on the core resistance.
The core material has a great influence on the core loss. The inductor commonly used in SMPS power supplies is iron powder core, and iron nickel molybdenum powder core (MPP) has the lowest loss. Iron powder core has the lowest cost, but the core loss is relatively large.
Core loss can be estimated by calculating the maximum change in core flux density (B), then looking at a graph of flux density and core loss (and frequency) provided by the inductor or core manufacturer. Peak flux density can be calculated in several ways, and the formula can be found in the core loss curve in the inductor data sheet.
Accordingly, if the core area and number of coils are known, the peak flux can be estimated using the following formula:
Here, B is the peak flux density (gauss), L is the coil inductance (henry), ΔI is the peak-to-peak inductor ripple current (amperes), A is the core cross-sectional area (cm2), and N is the number of coil turns.
With the popularity of the Internet, it is easy to download data and search for device information from the Internet. Some manufacturers provide interactive inductor power consumption calculation software to help designers estimate power consumption. Using these tools can quickly and accurately estimate the power loss in the application circuit. For example, Coilcraft provides an online inductor core loss and copper loss calculation formula. Simply enter some data to get the core loss and copper loss of the selected inductor.
Contrary to the ideal capacitor model, the actual physical characteristics of capacitor components lead to several losses. Capacitors mainly play the role of voltage regulation and input/output noise filtering in SMPS circuits (Figure 1). These losses of capacitors reduce the efficiency of switching power supplies. These losses are mainly manifested in three aspects: equivalent series resistance loss, leakage current loss and dielectric loss.
The resistive losses of a capacitor are obvious. Since current flows in and out of the capacitor during each switching cycle, the inherent resistance (RC) of the capacitor will cause some power loss. Leakage current loss is the power loss caused by the resistance (RL) of the capacitor's insulating material causing a small current to flow through the capacitor. Dielectric loss is more complicated. When an AC voltage is applied across the capacitor, the electric field of the capacitor changes, which polarizes the dielectric molecules and causes power loss.
Figure 9. Capacitor loss models are often simplified to an equivalent series resistance (ESR).
All three losses are represented in the typical loss model for capacitors (left side of Figure 9), with each loss represented by a resistance. The power of each loss associated with the energy stored in the capacitor is represented by the power dissipation factor (DF), or loss tangent (δ). The DF for each loss can be found by taking the ratio of the real to imaginary part of the capacitor impedance, and plugging each loss into the model separately.
To simplify the loss model, the contact resistance loss, leakage current loss and dielectric loss in Figure 9 are lumped into an equivalent series resistance (ESR). ESR is defined as the portion of the capacitor impedance that consumes active power.
When extrapolating the capacitor impedance model and calculating the ESR (real part of the result), the ESR is a function of frequency. This dependency can be demonstrated in the following simplified ESR equation:
Where DFR, DFL and DFD are the power dissipation factors for contact resistance, leakage current and dielectric loss.
Using this equation, we can observe that as the signal frequency increases, both leakage current losses and dielectric losses decrease until contact resistance losses begin to dominate from a higher frequency point. Above this frequency point (not included in the equation), the ESR tends to increase due to the skin effect of high frequency AC current.
Many capacitor manufacturers provide ESR curves to show the relationship between ESR and frequency. For example, TDK provides ESR curves for most of its capacitor products. Refer to these curves corresponding to switching frequency to obtain the ESR value.
However, if an ESR graph is not available, a rough estimate of ESR can be obtained from the DF specification in the capacitor data sheet. DF is the overall DF of the capacitor (including all losses), and ESR can also be estimated as follows:
Regardless of which method is used to obtain the ESR value, intuition tells us that high ESR will reduce the efficiency of the switching power supply, since the input and output capacitors are charged and discharged through the ESR during each switching cycle. This results in I2× RESR power loss. This loss (PCAP(ESR)) can be calculated as follows:
PCAP(ESR) = ICAP(RMS)2 × RESR
Where ICAP(RMS) is the RMS value of the AC current flowing through the capacitor. For the output capacitor of the buck circuit, the RMS value of the inductor ripple current can be used. The calculation of the RMS current of the input filter capacitor is more complicated, and a reasonable estimate can be obtained according to the following formula:
ICIN(RMS) = IOUT/VIN × [VOUT (VIN - VOUT)]1/2
Obviously, to reduce capacitor power loss, low ESR capacitors should be selected, which helps the SMPS power supply reduce ripple current. ESR is the main cause of output voltage ripple, so choosing low ESR capacitors not only improves efficiency, but also brings other benefits.
Generally speaking, capacitors with different types of dielectrics have different ESR levels. For a given capacitance and voltage rating, aluminum electrolytic and tantalum capacitors have higher ESR values than ceramic capacitors. Polyester and polypropylene capacitors have ESR values between them, but these capacitors are larger in size and are rarely used in SMPS.
For a given type of capacitor, a larger capacitance and lower fS can provide a lower ESR. Larger capacitors generally also reduce ESR, but electrolytic capacitors introduce a larger equivalent series inductance. Ceramic capacitors are considered a good compromise, and lower capacitor voltage ratings can also help reduce ESR for a given capacitance value.
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