Clock circuit PCB design layout and wiring requirements

YXC扬兴晶振

Clock circuit PCB design layout and wiring requirements [Copy link]

The clock circuit is an oscillator circuit that operates accurately as a timing function. Any work is in time sequence, so the circuit that generates this time is the clock circuit. The clock circuit is generally composed of a crystal oscillator/resonator, a control chip/RTC chip and matching capacitors.

As shown in Figure 1

Figure 1

There are the following points to note for clock circuit PCB design:

1. The crystal circuit layout needs to be given priority. The overall layout should be compact. The layout should be placed on the same layer as the chip and as close as possible to avoid drilling vias. The crystal routing should be as short as possible, away from interference sources, and as far away from the edge of the board as possible;

2. If the crystal circuit is placed on a different layer from the chip during layout, it should be placed as close to the chip as possible to shorten the routing. The crystal routing should also be grounded to avoid interference.

3. The crystal and clock signal routing need to be grounded throughout. At least one GND via should be added every 200-300 mils, and the ground reference plane of the adjacent layer must be intact, as shown in Figure 2.

4. The current layer of the crystal can be surrounded by GND routing to form a ground ring, and GND vias can be placed in the ground ring to connect to the adjacent GND plane layer to isolate noise;

as shown in picture 2

Figure 2

5. No routing is allowed on the clock routing Xin and Xout as well as the projection area below the crystal to prevent noise from coupling into the clock circuit;

6. The adjacent layers below the crystal must ensure a complete reference plane to avoid cross-division, which helps to isolate noise and maintain crystal output.

As shown in Figure 3

Figure 3