On the road to pursuing the dream of superconductivity, this resistor that constantly breaks the limit is more realistic
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yOriginal text: This resistor that keeps breaking the limit is more realistic
In March 2023, a 5.4 mΩ 750V SiC FET in TOLL package was released. This is the first product in the 750V SiC FET series to use TOLL package. These devices have further reduced thermal resistance and compact size, making them suitable for a variety of space-constrained applications, such as AC/DC power supplies with power ranging from hundreds of watts to several kilowatts, solid-state relays, and solid-state circuit breakers with currents up to 100A and above. Especially industrial applications, especially those that require high-power power supply designs that combine flexibility and compact size, high efficiency and high reliability.
Behind the "far ahead", let's take a look at the hard-core technology that reduces every 0.1mΩ
Just as energy loss occurs in all non-superconducting media, current conduction in all SiC FET devices will produce certain power losses. The power loss in SiC FET device conduction is proportional to its rated RDS(on) value. This loss is equivalent to a decrease in system efficiency. Lower RDS(on) means higher efficiency.
However, it is not easy to achieve a lower RDS(on) - the size of the FET needs to be increased. Increasing the size means increasing the cost - obviously, device manufacturers must balance between cost, size and RDS(on). As mentioned above, among the products below 10mΩ, the UF3SC065030D8S of the 650V SiC FET adopts the DFN 8x8 package, and its RDS(on) of 34mΩ also has the lowest RDS(on) in this voltage level. This is mainly because Qorvo's SiC FET technology is much smaller than the chip size of other competitors under the same impedance compared with traditional packaging. Therefore, Qorvo's SiC FET products can perfectly meet the chip size requirements of the DFN 8x8 package, optimize the volume and space share, and the package thickness is <1mm. Balance the size and RDS(on) to achieve the optimization of the target performance.
As for Qorvo's SiC FET, since the overall chip size is much smaller than that of competitors' SiC, silicon and other power technology products, the application flexibility is much higher than similar products. Behind this, many devices benefit from the unique common source and common gate structure SiC technology developed by Qorvo, which packages SiC JFET and Si MOSFET together, allowing the device to give full play to all the energy efficiency advantages brought by its wide bandgap switching technology and simpler Silicon MOSFET gate drive.
Qorvo的每一代芯片都变得越来越小，但应用的功率等级并不会降低甚至更高。为了解决热问题，碳化硅芯片变薄，随着芯片变薄，芯片的寄生参数随之而降低，带来的好处是开关速度变快，相应的Junction-case的热阻也降低了。然而，由于薄晶片容易断裂，因此处理起来极为困难。在这里，需要解决大量的工程问题，例如其中也涉及到的烧结技术至关重要，也显著降低了RDS(on)。
Pursuing the lowest "superconducting" RDS(on), more and more applications are benefiting
Reducing conduction losses by optimizing switching losses and reducing RDS(on) has been proven in more and more projects, bringing extensive benefits to customers and manufacturers. For example, more powerful new applications can be realized in electric vehicles, such as traction drives, on-board and off-board chargers, as well as renewable energy inverters, power factor correction, telecom power converters and all power stages of AC/DC or DC/DC power conversion.
Qorvo's silicon carbide devices have both advantages, which can minimize the heat dissipation of renewable energy equipment such as solar inverters and energy storage. By using SiC FET to replace IGBT in traction inverters, the switching frequency can be increased, the use of non-ferrous metals and the value of inductance and capacitance can be reduced, the driving current waveform is more ideal, and more power consumption can be saved, thereby increasing the semiconductor efficiency by 1.6% to 99.36% at 200kW output, and reducing power loss by 3kW.
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