Use simulation to see whether large or small holes should be used for high current vias

Nubility

Use simulation to see whether large or small holes should be used for high current vias [Copy link]

 

Today I installed the AD PDN plug-in, and by the way, I verified whether large holes or small vias should be used for high-current PCB layer change (when the via area is the same). I used a current of 20A and vias with apertures of 0.2, 0.4, and 0.6 mm for simulation, and the criterion was current density. Let me first state the conclusion. From the simulation results, it can be seen that the effect of layer change with 0.6mm vias is better. Of course, the so-called "simulation" I did here is based on the default parameters of the software. The actual situation is much more complicated than this, and here I am just looking at it in theory. I have no experience in simulation, so I am just a novice, so please don't criticize me, simulation masters.

PCB power supply layout

0.2mm via current density simulation results

0.4mm via current density simulation results

0.6mm via current density simulation results

qwqwqw2088

20A current should be quite large, 0.2, 0.4, 0.6mm vias

From the actual experience of making boards, if there are no other requirements, 0.6 is the preferred

The simulation is to confirm

If the AD simulation function is useful, use it.

qwqwqw2088

The simulation function of Z version is more powerful

hhp_008

This function is good, I will install and simulate it when I have time.

Nubility

qwqwqw2088 posted on 2023-9-9 08:21 The current of 20A should be quite high. From the experience of making boards, if there are no other requirements, the vias with diameters of 0.2, 0.4, and 0.6 mm are also 0. ...

I recently made a board with a maximum current of 40A. The holes used were also 0.2mm, but the number of vias per layer change was several times that here.

Nubility

hhp_008 posted on 2023-9-9 08:37 This function is good, I will install the simulation when I have time.

It's okay to have a rough look, which should be enough to evaluate the power bottleneck, and you can also take a rough look at the voltage drop

xutong

qwqwqw2088 posted on 2023-9-9 08:23 The simulation function of Z version is more powerful

What does Z version refer to?

qwqwqw2088

xutong posted on 2023-9-10 09:53 What does Z version refer to?

Genuine, pirated simulation functions are almost unusable

xutong

qwqwqw2088 posted on 2023-9-10 15:24 Genuine, the simulation function of pirated products is almost unusable

Let’s use LTspice

xjj850205

hhp_008 posted on 2023-9-9 08:37 This function is good, I will install the simulation when I have time.

I recently made a board with a maximum current of 40A and the holes used were also 0.2mm.

xjj850205

xutong posted on 2023-9-10 16:18 Let's use LTspice

Genuine, pirated simulation functions are almost unusable

qwqwqw2088

xutong posted on 2023-9-10 16:18 Let's use LTspice

The original AD purchased by the host has the simulation function.

After the schematic design, the simulation was carried out

LTspice needs to draw the schematic again

qwqwqw2088

These are all simulation functions written in Spice kernel

xutong

qwqwqw2088 posted on 2023-9-10 17:43 The host bought the genuine AD with simulation function. After designing the schematic diagram, he simulated LTspice. He had to draw the schematic diagram again...

Ad is too expensive, so I'd rather use Kicad simulation

xjj850205

xjj850205 posted on 2023-9-10 16:35 Genuine, the simulation function of pirated products is almost unusable

The original AD purchased by the host has the simulation function.

Nubility

xjj850205 posted on 2023-9-10 19:14 The host bought the genuine AD with simulation function

The main thing is to see where the current density of the PCB copper foil is mainly distributed, and then find that even at the edge, as long as it is not disconnected, the current density will be relatively high.