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Beijing's well-known 5G chip developer is recruiting: digital front-end engineer (RISCv or CPU digital front-end direction) [Copy link]

Digital front-end engineer (two positions each for RISC V digital front-end and CPU digital front-end, 40-70k)
Job responsibilities1 .
Complete SOC design and integration according to chip specifications;
2. Use simulation verification tools to complete SOC design verification;
3. System performance analysis and optimization;
4. Timing analysis and post-simulation;
5. Complete the writing, maintenance, and archiving of technical data and product documents;
Job requirements1
. Electronics/microelectronics/computer related majors are preferred;
2. Have relevant work experience, and exceptional candidates can be exceptions3
. Proficient in Verilog/VHDL language, familiar with the chip design process, including RTL code writing, functional verification, synthesis, and timing analysis;
4. Proficient in TCL/Perl/Shell and other scripting languages;
5. Work conscientiously and steadily, have the ability to study and study, and have the ability to solve problems independently;
6. Those with the following experience will be given priority
- Experience in SoC design, familiar with AMBA bus protocol;
- Experience in RISC V design;
- Experience in SERDES and LVDS high-speed interface circuit design is preferred;
- Priority will be given to candidates with experience in communications-related fields;


Work location: Haidian District, Beijing
Company: Well-known 5G chip R&D manufacturer
Salary: 40-70k
Contact information: VX: zhiyayoule Email: topjob@139.com

This post is from Recruitment
 
 

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