Functions and applications of MS90C386B and MS90C385B
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MS90C386B、MS90C385B/G is a single-port 1Port_LVDS_RxTx launched by Hangzhou Ruimeng Company in 2012 .90C386B is LVDS to TTL, directly replace THC63LVDF84B , DS90C386、DTC34LF86Lwait;
MS90C385B/G为TTL to LVDS,MS90C385B is TSSOP56 package , MS90C385GTFBGA56 package , directly replace THC63LVD83D , DS90C385、DTC34LF85LEtc. The key features are as follows :
1. MS90C386B : LVDS to TTL
MS90CThe 386 ( B ) chip can convert 4 -channel low voltage differential signals ( LVDS ) into 28-bit TTL data . The clock channel is phase-locked and output in parallel with the data channel. When the clock frequency is 85MHz , 24-bit RGB data , 3-bit LCD timing data and 1-bit control data are transmitted at a rate of 595Mbps in each LVDS data channel. When the input clock frequency is 85MHz , the data transmission rate is 297.5Mbytes/sec . This chip is used with MS90C385 is an ideal product for solving electromagnetic interference and cable length problems at the high-bandwidth, high-speed TTL signal level.
◇ Pin to Pin replacement: THC63LVDF84B , DS90C386、DTC34LF86L、GM8284
◇MS90C386 and MS90C386B only has version differences, MS90C386B compatible with MS90C386！
◇MS90C386 Functional Block Diagram
◇ Frequency range: 20-85MHz clock signal
◇ Fewer buses reduce wiring size and cost
◇ Power supply 3.3V
◇ Support VGA , SVGA , XGA , SXGA
◇ 2.38Gbps data throughput
◇ 297.5Megabytes/sec bandwidth
◇ Reduce LVDS swing to reduce electromagnetic interference ( 300mV LVDS swing)
◇ Follow TIA /EIA-644 LVDS standard
◇ TSSOP56 package2
, MS90C385B/G：TTL to LVDS
MS90CThe 385B/G chip can convert 28-bit TTL data into a 4- channel low-voltage differential model ( 1Port LVDS ). The clock channel is phase-locked and output in parallel with the data channel. When the clock frequency is 150MHz , 24-bit RGB data , 3-bit LCD timing data and 1-bit control data are transmitted at a rate of 1050Mbps in each LVDS data channel. When the input clock frequency is 150MHz , the data transmission rate is 525Mbytes/sec . MS90CThe R_FB pin of 385 can be selected to be effective at the rising edge or falling edge of the clock. This chip is an ideal product for solving electromagnetic interference and cable length problems at the high-bandwidth, high-speed TTL signal level.
◇MS90C385B/G Functional Block Diagram
◇MS90C385B package TSSOP56, MS90C385GPackageTFBGA56 ◇ MS
90C385B Pin to Pin replacement: THC63LVD83D , DS90C385、DTC34LF85L
◇MS90C385B compatible with MS90C385 !
◇ Frequency range: 20-150MHz clock signal
◇ Core power supply 3.3V
◇ IO power supply 1.8V , 3.3V compatible
◇ Support VGA , SVGA , XGA , SXGA
◇ Support spread spectrum clock generation
◇ Internally integrated input jitter filter
◇ Reduce LVDS swing to reduce electromagnetic interference ( 200mV , 345mV LVDS swing available)
◇ PLL does not require external structure
◇ Follow TIA/EIA-644 LVDS standard
3 , MS90C385B/MS90C386B specific application in VESA - JEIDA specification There are two
LVDS signal formats: one is the JEIDA standard, and the other is the VESA standard. The older LCD screens have 6 bits , the common ones now are 8 bits , and the new ones are 10 bits , with 7 bits of data in each clock cycle ( different from the TMDS standard). LVDS Tx (TTL to LVDS) is based on the MS
90C385B as an example, LVDS Rx (LVDS to TTL) is based on the MS90C386 as an example, we usually implement the driver software configuration of 6Bie and 8Bit screens according to the VESA standard . The LVDS TxRx pins corresponding to the VESA format are shown in the figure below.
90C386 ( LVDS to TTL ) as an example, there are two ways to connect the 6-bit screen VESA interface hardware as follows:
Connection method 1 , 6-bit high-bit RGB data ( R6 R7 G6 G7 B6 B7 ) Floating (or grounded): The screen driver software does not use the high-bit RGB data configuration, enabling R0 R1 R2 R3 R4 R5 G0 G1 G2 G3 G4 G5 B0 B1 B2 B3 B4 B5 Hsync Vsync DE , corresponding to MS90C386 Pins are 27 29 30 32 33 35 37 38 39 43 45 46 47 51 53 54 55 1 3 5 6 , R6 R7 G6 G7 B6 B7 is suspended or grounded, and its corresponding MS90C386 Pin 7, 34, 41, 42, 49, 50 are suspended or grounded. It is recommended to ground unused pins to prevent electromagnetic interference! Note that the screen driver software uses the VESA mode high-bit RGB data ( R6 R7 G6 G7 B6 B7 ) Not used!
Connection method 2 , 6-bit low-order RGB data ( R0 R1 G0 G1 B0 B1 ) Floating (or grounded): The screen driver software does not use the configuration according to the low-bit RGB data, enabling R2 R3 R4 R5 R6 R7 G2 G3 G4 G5 G6 G7 B2 B3 B4 B5 B6 B7 Hsync Vsync DE , corresponding to MS90C386 pins are 30 32 33 35 7 34 39 43 45 46 41 42 53 54 55 1 49 50 3 5 6 , R0 R1 G0 G1 B0 B1 is suspended or grounded, corresponding to MS90C386 Pin 27 29 38 39 47 51 is suspended or grounded. It is recommended to ground the unused pins to prevent electromagnetic interference! Note that the screen driver software uses the VESA mode low-bit RGB data ( R0 R1 G0 G1 B0 B1 ) Do not use configuration! There is only one way to connect the
6Bit JEIDA interface screen hardware, enable R2 R2 R3 R4 R5 R6 R7 G2 G3 G4 G5 G6 G7 B2 B3 B4 B5 B6 B7 Hsync Vsync DE , corresponding MS90C386 pins are 27 29 30 32 33 35 37 38 39 43 45 46 47 51 53 54 55 1 3 5 6 pins, unused pins are grounded. Note that the screen driver software is configured in JEIDA mode! MS90C385B、MS90CFor 386B 8Bit LVDS VESA and JEIDA formats, just connect as shown in the table below.
90C385B MS90C386B VESA and JEIDA format pin corresponding RGB data table
MS90C385G_2022.pdf
(1.37 MB, downloads: 1)
MS90C385B-2022.V2.0.pdf
(1.2 MB, downloads: 6)
MS90C386（B）.pdf
(1.04 MB, downloads: 1)
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