If the voltage difference between the input and output of LDO is too small, will it have a bad effect?

小太阳yy

If the voltage difference between the input and output of LDO is too small, will it have a bad effect? [Copy link]

If the voltage difference between the input and output of LDO is too small, will it have a bad effect? I have seen that many constant current LDO chips have a minimum voltage difference requirement of 600mv, so in my actual application, will there be any disadvantages if the voltage difference is less than 600mv? Or is 600mv ok?

littleshrimp

The actual voltage difference is less than the minimum voltage difference of the device, which will affect the voltage regulation effect. For example, when the actual output voltage is 3.3V, the actual output voltage will be lower than this value.

The voltage drop of LDO is related to current and temperature. The larger the current, the higher the minimum voltage drop. The higher the temperature, the higher the minimum voltage drop. If your circuit can meet the minimum voltage drop requirement of the device at any time (regardless of voltage and current fluctuations or temperature and other factors), I think you can use the same value. But in reality, your circuit will not be this ideal circuit.

littleshrimp

Regarding LDO, it is recommended to read this document

https://www.analog.com/media/cn/technical-documentation/application-notes/AN-1072_cn.pdf

小太阳yy

littleshrimp posted on 2021-10-8 15:05 Regarding LDO, it is recommended to read this document https://www.analog.com/media/cn/technical-documentation/application-not ...

Thanks for the help!

maychang

"? I've seen many constant current LDO chips have a minimum input-output voltage difference requirement, such as 600mv."

That is not a "constant current" chip, but a constant voltage output chip, i.e. a voltage regulator.

maychang

"So in my actual application, is there anything wrong if the voltage difference is less than 600mv?"

If the input-output voltage difference is smaller than this value in actual application, the chip cannot guarantee the stability of the output voltage, which is called "unstable".

kissxpchao

Learn, share experiences, and grow together. Thank you all for sharing your experiences.

se7ens

Simply put,

The lower the input voltage, the lower the LDO output will be. The voltage difference between them must be greater than the minimum chip setting voltage difference value.

yangshaohuihui

You are all so professional. This is my first time here. Please give me some guidance. Thank you!