Circuit Problem Analysis

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As shown in the figure below, the circuit has the following problems:

1. The output V1 of the above op amp was tested with a 6.5-digit multimeter. The value dropped at a speed of about 1uV/S in the uV position (the test lead was kept on for about 10 seconds without stopping).

Testing the reverse end to ground voltage, it fluctuates in the 11-12uV range, which seems normal.

How to explain the V1 drop problem.

2. The output of the op amp below fluctuates at the 10uV level, with a maximum change of 30uV. It also has the problem of gradually decreasing output.

When testing the reverse end to ground, the voltage value is around 22uV, and it fluctuates within the range of 1uV, which seems to be fine.

What's wrong with this op amp circuit?

chunyang

The circuit is wrong. The high voltage input needs to be divided first, and then the op amp circuit determines the feedback resistor value according to the gain requirements.

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chunyang posted on 2021-9-23 18:26 The circuit is wrong. The high voltage input needs to be divided first, and then the op amp circuit determines the feedback resistor value according to the gain requirements.

Is this not the cause of the circuit failure?

It must be input at negative pressure and then enter the ADC, so it must be inverted.

Also, the voltage drop seems to be the cause of the DC-500V.

Now the op amp below has a 50HZ ripple, which is not generated by the power supply (the op amp above does not have it). It is suspected to be oscillation, but the calculated compensation is correct and there should be no oscillation.

maychang

The op amp above has a calculated output voltage of 75mV. Does your ADC require a 75mV input?

maychang

Alas, published on 2021-9-24 08:48 This is not the cause of the circuit failure, right? Negative voltage input is required, and then it enters the ADC, so it must be inverted. In addition, the voltage drop seems...

"Also, the voltage drop seems to be caused by DC-500V."

Then you need to measure the negative 500V DC voltage at the input end and the voltage across C1 at the same time to determine whether it is the cause of the negative 500V.

maychang

Alas, published on 2021-9-24 08:48 This is not the cause of the circuit failure, right? Negative voltage input is required, and then it enters the ADC, so it must be inverted. In addition, the voltage drop seems...

"Now the lower op amp has a 50HZ ripple, which is not generated by the power supply (the upper op amp does not have it), and I suspect it is an oscillation."

The possibility of oscillation in the op amp in this circuit is very small. The 50Hz ripple may be caused by the negative 500V input.

呜呼哀哉

maychang posted on 2021-9-24 10:22 The above op amp has an output voltage of 75mV. Does your ADC need a 75mV input?

This is the maximum that can be

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maychang posted on 2021-9-24 10:25 "In addition, the voltage drop seems to be caused by DC-500V. " Then you have to measure the negative 500V DC voltage at the input end and the voltage across C1 at the same time to...

The inverter module is powered by an adjustable LDO. It is obviously hot. The DC-500 is tested. The voltage drops in mV. According to the ratio, the output of the op amp should drop in uV.

呜呼哀哉

maychang published on 2021-9-24 10:27 "Now the op amp below has a 50HZ ripple, which is not generated by the power supply (the op amp above does not have it), and it is suspected to be oscillation." The op amp in this circuit produces...

This is not a power supply problem. R4 is disconnected from the power supply, and the ground test will generate a 50HZ signal. The value increases and becomes more obvious. Some people believe that R4 is too large and it is easy to introduce power frequency interference. I began to believe this. R4 can reach a maximum of 2000M

maychang

Alas, published on 2021-9-24 10:40 This is not a power supply problem. R4 is disconnected from the power supply, and a 50HZ signal will be generated when tested against the ground. The larger the value, the more obvious it is. Some people believe that R4 is too large, and it itself...

Yes, the circuit may introduce 50Hz power frequency interference from the surrounding environment because the test environment is filled with a large number of 50Hz electric and magnetic fields.

In addition, the power supply for the op amp may also introduce 50Hz power frequency interference.

maychang

Alas, published on 2021-9-24 10:40 This is not a power supply problem. R4 is disconnected from the power supply, and a 50HZ signal will be generated when tested against the ground. The larger the value, the more obvious it is. Some people believe that R4 is too large, and it itself...

In your circuit, whether R4 can use 20 megohms or even 2000 megohms depends on the op amp model you use.

It would be best if you could post the instruction manual of the op amp you are using.

maychang

Alas, published on 2021-9-24 10:40 This is not a power supply problem. R4 is disconnected from the power supply, and a 50HZ signal will be generated when tested against the ground. The larger the value, the more obvious it is. Some people believe that R4 is too large, and it itself...

In another post, you mentioned that the output of the upper op amp has no 50Hz component, while the output of the lower op amp has a 50Hz component. Note that the resistor R3 in series with the output of the upper op amp is 100 kilo-ohms, while the resistor R6 in series with the output of the lower op amp is 10 kilo-ohms, which is a 10-fold difference.

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maychang posted on 2021-9-24 11:00 In another post you mentioned that the output of the op amp above this post has no 50Hz component while the output of the op amp below has a 50Hz component. Note the resistor in series with the output of the op amp above...

All the tests were done before RC, so filtering will not have any effect. Now it's a bit confusing. The calculation of the op amp compensation (noise gain compensation) below is considered effective, but it is of no use to the circuit. The op amp is OPA140, the parasitic input capacitance is about 20pF, and the feedback resistor is 165K. The calculation will produce a pole around 48K, so it is considered to be unstable.

Now remove the compensation network at the inverting end and connect a 1uF capacitor in parallel with the feedback resistor of the op amp below. There is no oscillation and the 50Hz effect is also solved. But it doesn't make sense, because the gain resistor R4>>R5, the zero and pole generated by this capacitor overlap. It's completely wrapped up.

maychang

Alas, published on 2021-9-24 11:31 All the tests were done before the RC, so the filtering will not have any effect. Now it's a bit messy, the op amp compensation (noise gain compensation) below is in progress...

"All tests were done before the RC, so filtering will not have any effect."

If the measurement is made before RC, of course the RC value will not be affected.

Then, the reason why the output of the op amp below contains 50Hz ripple may be that R4 is much larger than R1 and is more affected by the industrial frequency electric field in the environment.

gmchen

Alas, published on 2021-9-24 11:31 All the tests were done before the RC, so the filtering will not have any effect. Now it's a bit messy, the op amp compensation (noise gain compensation) below is in progress...

To compensate for the op amp input capacitance, the method of the initial circuit is incorrect. The capacitor should be connected in parallel with the feedback resistor.

The distributed capacitance at the input of the op amp forms a pole in the feedback network. The C5 you added to the initial circuit still forms a pole, so it cannot be compensated.

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gmchen posted on 2021-9-24 12:21 To compensate the input capacitance of the op amp, the method of the circuit at the beginning is wrong. It should be to connect the capacitor in parallel with the feedback resistor. The distributed current at the input of the op amp...

It is believed that the feedback resistor + op amp input capacitance will cause instability.

The compensation of feedback resistor and capacitor in parallel is called leading compensation. This compensation is usually effective only when the feedback resistor is larger than the gain resistor. Now the gain resistor is much larger than the feedback resistor. From the calculation formula, it is not effective at all, but it is actually effective.

In this case, RG>>RF, the contents in the middle bracket should be offset. Even if it is unity gain stable, when the latter bracket is not considered, the poles generated by the parasitic capacitance are basically not processed, but there is no oscillation.

PowerAnts

Alas, published on 2021-9-24 08:48 This is not the cause of the circuit failure, right? Negative voltage input is required, and then it enters the ADC, so it must be inverted. In addition, the voltage drop seems...

possibility:

1. The op amp has a bias current. After the circuit is balanced, if a multimeter is connected, the sampling shunt and spatial magnetic field coupling of the multimeter will destroy the balance.

2. Maybe your test lead loop senses other very low frequency magnetic field changes, such as a moving iron block nearby, sunspots, etc. 1uV/V is very small. Short-circuit the test leads and check.

There's nothing wrong with the circuit itself.

PowerAnts

gmchen posted on 2021-9-24 12:21 To compensate the input capacitance of the op amp, the method of the circuit at the beginning is wrong. It should be to connect the capacitor in parallel with the feedback resistor. The distributed current at the input of the op amp...

In my opinion, what the OP needs to compensate is not the input capacitance of the op amp inverting terminal to ground, but the distributed capacitance at both ends of R1 and R4. If there is a bandwidth requirement, the capacitor should be connected at both ends of Rf according to its ratio to Rf. If only the DC component is measured, it can be appropriately larger to ensure acceptable response speed.

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PowerAnts posted on 2021-9-24 19:24 In my opinion, what the OP needs to compensate is not the input capacitance of the op amp inverting terminal to ground, but the distributed capacitance at both ends of R1 and R4. If there is a bandwidth requirement, press...

grateful.

Remove the original compensation and the capacitor in parallel with R4, and test the inverting terminal of the op amp to ground. The DC voltage is only 11uV, which confirms that the op amp has no oscillation and can be used without compensation. The capacitor in parallel with R4 has a low-pass effect on the closed-loop gain and is increased to 1uF, which feels OK.

PowerAnts

Wuhuaizai published on 2021-9-24 20:57 Thank you. Remove the original compensation and the capacitor in parallel with R4, and test the inverting terminal of the op amp to ground. The DC voltage is only 11uV, which can confirm that the op amp has no...

The inverting amplifier does not meet the oscillation conditions without 3-level phase shift. The jump you measured below is because R5 is relatively large, and the signal coupled by R4 itself and the distributed capacitance of the two-end nodes and the network is amplified.

The distributed capacitance on R4 is calculated as 1pF, and the input network is a 0.1HZ single pole + 10KHz double zero. If 100p is connected to R5, it should be very stable. If not, check the distributed parameters of R4.