Introduction to ARM SWD Protocol

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Introduction to ARM SWD Protocol [Copy link]

Introduction to ARM SWD Protocol

SWD stands for Serial Wire Debug, which is a simple debugging interface launched by ARM for embedded devices. This interface uses a bidirectional data line and a clock line to debug the ARM core. In the SWD protocol, there are three main stages on the bus:

1. Packet Request: This stage indicates that the external debugger sends a request to the Debug Port (DP).
2. Acknowledge Response: In this stage, the device returns an acknowledgement signal to the debugger.
3. Data Transfer Phase, during which the debugger writes data to the device or the device returns data to the debugger

There is usually a TRN interval between the three stages mentioned above, and the length is usually one clock. This interval is used for bus direction switching. When the debugger sends a request, the device must immediately return its own status as a response. During the data transmission stage, there is only a TRN interval for writing data.

When the data transfer is completed, the debugger needs to start the next request immediately, or continue to send at least 8 clock cycles, during which the data line should remain at a low level.

In SWD, both the Packet Request and Data Transfer stages have a parity bit, and the data is transmitted LSB first.

Packet and Acknowledge Data Definition

name	definition
Start	1'b1 start position
APnDP	Indicates whether to request DP (Debug Port)-1'b0 or AP (Access Port)-1'b1
R	0 indicates a write operation, 1 indicates a read operation
A[2:3]	Specify the address of DP or AP
Parity	Parity bit
Stop	1'b0 stop bit
Park	1'1 The host must drive this bit to 1 before switching direction
Trn	Direction Switch
ACK[0:2]	The device returns the current state to the debugger
WDATA[0:31]	The debugger writes data to the device
RDATA[0:31]	The device returns data to the debugger

SWD Write Operation

The SWD write operation includes the complete three stages mentioned above:

There is no Trn phase after the write operation, and the next data request can be initiated directly.

SWD Read Operation

The SWD read operation also includes three complete stages.

There is no Trn after the read operation ACK, the device must return the data directly, and Trn is required after the data transmission is completed to initiate the next request.

If the debugger initiates a DP read request, the device can directly return the DP data result. If it is an AP read, the device needs to return the result at the next read (DP or AP). For continuous AP read operations, the debugger only needs to insert an RDBUFF:

1. The first AP read operation returns data results that are directly discarded
2. Each subsequent AP read operation returns the previous AP read result.
3. Finally, send another AP to read the previous AP result.
4. Read DP RDBUFF to read the last AP access result

SWD Wait

If the device cannot process the debugger's request normally, the device can return a WAIT response, WAIT response ACK[0:2]=3'b010, but the device should not return a WAIT response when reading the DPIDR, CTRL/STAT/ABORT registers. Generally, after receiving the WAIT response, the debugger only needs to resend the request. If multiple requests still fail, the ABORT.DAPABOUToperation can be terminated by writing.

Connect and bus reset

When a debugger is connected or various errors occur on the bus, the debugger can reset the device's debug interface by sending a reset signal. The reset signal is completed by sending at least 50 clocks, keeping the data line at 1, and then sending a low level for at least 2 clocks, that is, sending at least 50 1s and at least 2 0s.