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Recommendations for components encountered in peak sampling circuit design [Copy link]

 

Dear friends, I am making a peak current sampling module recently. The peak value is maintained by capacitors. It is confirmed that it is a CBB (polyester) series capacitor, but it is not sure whether it is CBB81 or CBB22. The voltage is not high, about 5V, and the capacitance is 10uF-100uF. Is there any reliable capacitor brand to recommend?

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Learned   Details Published on 2021-6-8 13:46

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The requirements are not high, and any products from regular manufacturers can meet their requirements, regardless of the brand.

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If the current change rate is 1000A/S, then the di/dt limit of the capacitor must be considered. This is mainly to stimulate discussion and see if there is a better one. Maybe I can get a pinless CBB.  Details Published on 2021-5-22 09:15
 
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Practice is the only criterion for testing truth. This is not complicated. You will understand it if you try it more often, and you may even gain unexpected results. Ha!

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I've been having a bad time lately, and I've been having some weird things happen to me, so I want to do things in a more detailed way. I started with a 1uF/63V, and I calculated that a 1uA leakage current will cause a 1V voltage drop per second. You can't say that semiconductor devices don't have leakage. I gave the NMOS a negative Vgs, is there any way to reduce it?  Details Published on 2021-5-22 09:10
 
 
 
 

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book1 Published on 2021-5-22 07:42 Practice is the only criterion for testing truth. This is not complicated. You will understand it if you try it more, and you may even gain unexpected results. Ha!

I've been unlucky lately, always encountering weird things, so I want to do things in a more detailed way.

At the beginning, I had 1uF/63V. I calculated that 1uA of leakage current would cause a voltage drop of 1V per second. You can't say that semiconductor devices have no leakage.

If I give NMOS a negative Vgs, will it reduce the Ids leakage?

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Is the NMOS junction capacitance sufficient? The capacitance decreases when reverse voltage is applied. Some low voltage dropout Schottky diodes (around 0.1V) have a junction capacitance of several thousand nF.  Details Published on 2021-5-22 16:03
 
 
 
 

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chunyang posted on 2021-5-21 20:00 The requirements are not high, and any product from a regular manufacturer can meet them, regardless of the brand.

If the current change rate is 1000A/S, then the di/dt limit of the capacitor must be considered. This is mainly to stimulate discussion and see if there is a better one. Maybe I can get a pinless CBB.

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What needs to be considered are the parasitic parameters. In this case, CBB cannot be used at all, regardless of whether it has feet or not, and it is not applicable to the specifications you need. It can be said that it has nothing to do with the original poster's post.  Details Published on 2021-5-24 14:26
 
 
 
 

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Alas, published on 2021-5-22 09:10 I have been unlucky recently, always encountering weird things, so I want to do things more carefully. At the beginning, I had 1uF/63V, but after calculating, the leakage of 1uA...

Is the NMOS junction capacitance enough? The capacitance decreases when reverse voltage is applied. Some low voltage dropout Schottky diodes (around 0.1V) have a junction capacitance of several thousand nF.

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Directly use IC
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Directly use IC, LM311+LF298 should be able to do it
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You are talking about a method without diodes. I use an op amp to drive a transistor and add a holding capacitor. Even if you use LM331 input comparison and LM311 output holding capacitor, there is still a problem of transistor Veb reverse leakage. At the same time, the sampling capacitor needs to be discharged for reset. Using MOS also has leakage. The best should be a relay.  Details Published on 2021-5-22 18:07
 
 
 
 

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3637320230 posted on 2021-5-22 17:26 Directly use IC, LM311+LF298 should be able to do it

You are talking about a method without diodes. I use an op amp to drive a transistor and add a holding capacitor. Even if you use LM331 input comparison and LM311 output holding capacitor, there is still a problem of transistor Veb reverse leakage. At the same time, the sampling capacitor needs to be discharged for reset. Using MOS also leaks. The best should be a relay, but it is too big and I don't want to use it.

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You didn't read my solution carefully. LM311D is for comparison, LF398 is for acquisition and holding, and it can finally detect your peak value.  Details Published on 2021-6-3 16:41
 
 
 
 

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Alas, published on 2021-5-22 09:15 If the current change rate is 1000A/S, then the di/dt limit of the capacitor must be considered. This is mainly to stimulate discussion and see if there is a better one, maybe...

What needs to be considered are the parasitic parameters. In this case, CBB cannot be used at all, regardless of whether it has feet or not, and it is not applicable to the specifications you need. It can be said that it has nothing to do with the original poster's post.

This post is from Analog electronics
 
Personal signature上传了一些书籍资料,也许有你想要的:https://download.eeworld.com.cn/user/chunyang
 
 
 

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This post was last edited by 3637320230 on 2021-6-3 16:42
Woohoo! Posted on 2021-5-22 18:07 What you said is a method without diodes. I use an op amp to drive a transistor and add a holding capacitor. Even if the LM331 input comparison is used, LM3 ...

You didn't read my solution carefully. LM311D is for comparison, LF398 is for acquisition and holding, and finally your peak value can be detected. You don't need to consider leakage and diode issues. It is convenient and simple.

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Thank you. This has been made. The solution you mentioned cannot be said to be bad. The leakage I mentioned is mainly after the peak, the LM331 output is low, and the output three-stage tube BE is reverse biased, which will leak. At that time, considering the 1uF capacitor, the continuous leakage of 1uA current is equivalent to the capacitor voltage dropping 1V per second, which cannot be maintained at all.  Details Published on 2021-6-3 16:53
 
 
 
 

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3637320230 posted on 2021-6-3 16:41 Alas posted on 2021-5-22 18:07 What you are talking about is a method without diodes. I use an op amp to drive a transistor and add a holding capacitor...

Thanks.

This has been made. The solution you mentioned cannot be said to be bad. The leakage I mentioned is mainly after the peak, the LM331 output is low, and the output three-stage tube BE is reverse biased, which will leak. At that time, considering the 1uF capacitor, the continuous leakage of 1uA current is equivalent to the capacitor voltage dropping 1V per second, which cannot be maintained at all.

The actual situation is not so serious. We still use the diode method and op amp driving, and add one more op amp to make the reverse voltage of the diode only have a tube voltage drop. Actually, using an oscilloscope to observe, the capacitor did not drop voltage for 10s.

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Is there a circuit?   Details Published on 2021-6-8 11:13
 
 
 
 

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Alas, published on 2021-6-3 16:53 Thank you. This is done. The solution you mentioned cannot be said to be bad. The leakage I mentioned is mainly after the peak value, the LM331 output is low, and the output...

Is there a circuit?

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As shown in the figure below, this is the peak hold part. The control G of NMOS is not used to provide negative  Details Published on 2021-6-8 13:38
 
 
 
 

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As shown in the figure below, this is the peak hold part. The control G of NMOS is not used to provide negative

捕获1.PNG (33.77 KB, downloads: 0)

捕获1.PNG
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Learned

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