Embedded MCU ARM Cortex-M3 operating modes and exceptions

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Embedded MCU ARM Cortex-M3 operating modes and exceptions [Copy link]

The MCU Cortex-M3 is a 32-bit processor core. The internal data path is 32 bits, the register is 32 bits, and the memory interface is also 32 bits. CM3 adopts the Harvard structure, with independent instruction bus and data bus, which can allow instruction fetch and data access in parallel. In this way, data access no longer occupies the instruction bus, thereby improving performance. Below, Yuxin Electronics introduces the working mode and exceptions of the embedded MCU ARM Cortex-M3.

1. Working mode
thread mode and handle mode.

When the processor is in thread state, it can use both privileged level and user level; on the other hand, handler mode is always privileged. After reset, the processor enters thread mode + privileged level.

2. Vector table

Because the boot code should be stored at address 0, it is usually mapped to Flash or ROM devices, and their values must not be changed at runtime. However, in order to support dynamic redistribution of interrupts, CM3 allows vector table relocation-locating each exception vector from other addresses. The area corresponding to these addresses can be the code area, but more often in the RAM area. The entry address of the vector can be modified in the RAM area. To achieve this function, there is a register in NVIC called "Vector Table Offset Register" (at address 0xE000_ED08), and the vector table can be relocated by modifying its value.

Vector Table Offset Register (VTOR) (Address: 0xE000_ED08)

3. Exceptions and Interrupts

Cortex-M3 supports a large number of exceptions, including 16-4-1=11 system exceptions, and up to 240 external interrupts - IRQ for short. How many of these 240 interrupt sources are used is determined by the chip manufacturer. The interrupt signals generated by the peripherals, except for SysTick, are all connected to the interrupt input signal line of the NVIC. Typically, the processor generally supports 16 to 32 interrupts.

System exceptions with type numbers 1-15 are external interrupt types starting from 16.

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The MCU Cortex-M3 is a 32-bit processor core. The internal data path is 32 bits, the register is 32 bits, and the memory interface is also 32 bits.