Please tell me how to output high level when using P0 port io of 51 microcontroller

EEW2018

Please tell me how to output high level when using P0 port io of 51 microcontroller [Copy link]

Please tell me how to output high level when using P0 port io of 51 microcontroller

maychang

"Please tell me how to output high level when using P0 port io of 51 microcontroller"

When the P0 port of the 51 single-chip microcomputer is used as a normal I/O port, a pull-up resistor must be added. When the output is high level, the output tube is turned off and the output end is pulled to a high level by the pull-up resistor.

maychang

In another post you posted on the PCB board, you have already responded to the issue of P0 outputting a high level when used as a normal I/O port. Didn't you see that response?

dcexpert

It is in the data sheet. Different 51 microcontrollers are slightly different.

EEW2018

maychang published on 2019-10-1 20:12 "Please tell me how to output a high level when the 51 microcontroller P0 port io is used" When the 51 microcontroller P0 port is used as a normal I/O port, it must be added...

Thank you very much. How does the io line in the figure below output a high level?

maychang

EEW2018 posted on 2019-10-2 04:00 Thank you very much. How can the io line in the figure below output a high level?

"How can the io line in the figure below output a high level?"

This question must be added with the condition "as an I/O port", because the circuit in the figure can also output a high level when used as an address/data bus.

maychang

EEW2018 posted on 2019-10-2 04:00 Thank you very much. How can the io line in the figure below output a high level?

Used as a common I/O port, the control signal (0, 1) is at a low level, so V1 is turned off, the multi-way switch is turned downward, and connected to the Q inverting output terminal of the latch.

When the [internal bus] (i.e. the latch input) is at a high level, and then a write pulse arrives at the [write latch], the latch latches the high level of the [internal bus], the Q end is at a high level, the Q inverting end is low, V2 is turned off, and the pin is pulled to a high level by the external pull-up resistor.

maychang

EEW2018 posted on 2019-10-2 04:00 Thank you very much. How can the io line in the figure below output a high level?

The red line in the figure represents the [flow chart when the internal data bus is output to the pin]. It is only the path of signal flow. The changes in amplitude and phase during the output process are not shown on the red line.

When you use the microcontroller in the future, you don’t have to worry about how the signal flows from the [internal data bus] to the P0 port pin. The microcontroller designer has already thought about it for you. You only need to care about whether the pull-up resistor connected to the pin can drive the load on the pin.