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Gallium Nitride Transistors Open New Frontiers in High-Speed Motor Drives [Copy link]

Unlike switch-mode power supplies, three-phase motor drive inverters typically use low switching frequencies; only tens of kilohertz. High-power motors are larger in size and have high-inductance windings; therefore, current ripple is acceptable even at low switching frequencies. As motor technology advances, power density increases; motors become smaller in size and faster, requiring higher electrical frequencies.

Low-voltage brushless DC or AC induction motors with low stator inductance are increasingly or exclusively used in precision applications such as servo drives, CNC (computer numerical control) machines, robots and utility drones. To keep the current ripple within reasonable limits, these motors - due to their low inductance - require switching frequencies of up to 100kHz; the phase current ripple is inversely proportional to the PWM (pulse width modulation) switching frequency and is converted into torque ripple in the machinery, generating vibrations and reducing drive precision and efficiency.

So why don’t engineers increase the switching frequency? As always in engineering, it’s a trade-off. The power losses in an inverter are primarily conduction losses and switching losses. You can reduce switching losses for a given operating frequency by reducing the size of the switching element (usually the MOSFET), but this results in increased conduction losses.

In an ideal design, the highest achievable efficiency is limited by the technology of the semiconductor switches. Using a conventional low-voltage 48V silicon MOSFET-based inverter, the switching losses at 40kHz PWM may already be significantly higher than the conduction losses, thus constituting the majority of the overall power losses. To dissipate the excess heat, a larger heat sink is required. Unfortunately, this increases system cost, weight, and overall solution size, which is not desirable or acceptable in space-constrained applications.

Gallium nitride (GaN) high electron mobility transistors (HEMTs) offer several advantages over silicon MOSFETs, opening up new possibilities. GaN transistors can achieve much higher dV/dt slew rates and can therefore switch faster than silicon MOSFETs, significantly reducing switching losses. Another advantage of GaN transistors is the absence of reverse recovery charge, which in conventional silicon MOSFET designs causes switch node ringing. Table 1 compares silicon FETs and GaN FETs.

parameter

Si-FET

TI 's GaN (HEMT)

Remark

Component structure

Vertical

Horizontal

Specific RDS(ON), Area

>10mW-cm2

5-8mW-cm2

Lower conduction losses.

Gate charge QG

~4nC-W

~1-1.5nC-W

Reduce gate driver losses, enable faster switching speeds, and reduce switching losses and dead-time distortion.

Output charge QOSS

~25nC-W

~5nC-W

Lower output capacitance enables faster switching and reduces switch charging losses

Reverse recovery QRR

~2-15mC-W

none

Zero reverse recovery enables high-efficiency half-bridge inverters and reduces/eliminates ringing in hard switching.

Table 1: Comparison of silicon power MOSFET and TI’s GaN FET (HEMT)

If you completely replace existing silicon MOSFETs with new GaN FETs, the world would be a much easier place to enjoy the benefits. For example, achieving high slew rates in gate drive circuits and printed circuit board (PCB) layout presents unique challenges. Higher dV/dt means increased electromagnetic interference (EMI) if not handled properly. Propagation delay mismatch between channels will limit the best achievable dead time, preventing GaN FETs from achieving their best performance.

TI's LMG5200 GaN power stage overcomes these difficulties by integrating two 80V/10A 18-mΩ GaN FETs with gate drivers in the same bond-free 6mm x 8mm quad flat no-lead (QFN) package. The package pins are designed for low power loop impedance and simple PCB layout. The inputs are 5V TTL and 3.3V CMOS logic compatible and have a typical propagation delay mismatch of 2ns. This enables very short dead time, reducing losses and output current distortion.

The TI Design 48V/10A High Frequency PWM 3-Phase GaN Inverter Reference Design for High-Speed Drives implements a B6 inverter topology with three LMG5200 half-bridge GaN power modules. A simplified block diagram is shown in Figure 1. This reference design provides a TI BoosterPack module-compatible interface for connecting to a C2000 microcontroller (MCU) LaunchPad kit for performance evaluation.

Figure 1 : High-frequency three-phase GaN inverter reference design

With all this theory, are you curious about how fast switching can be achieved in practice? Figure 2 shows a switch node with a slew rate of approximately 40V/ns. Despite the ultra-fast switching, the switch node overshoot is less than 10V. Unlike traditional silicon FET designs, this requires a smaller margin between the FET’s VDS breakdown voltage and the maximum allowed Vbus supply voltage.

Figure 2 : Switching node at 48V input and 10A load

Very high slew rates make shunt-based in-phase current measurement also challenging. The 48V three-phase inverter reference design with shunt-based online motor phase current sensing addresses this issue by using TI's INA240 differential precision current sense amplifier. The INA240 has a wide common-mode range of -4V to 80V and enhanced PWM rejection; its AC common-mode rejection ratio (CMRR) is 93dB at 50kHz and its DC CMRR is 132dB.

At a maximum load current of 7 ARMS, the reference design board dissipates 4.95W using a PWM frequency of 40kHz and 5.65W using 100kHz PWM. Figure 3 shows the power dissipation as a function of output current. The theoretical maximum efficiency for a 48V bus is achieved at a maximum input power of 400W. This results in a phase-to-phase voltage of 34VRMS at 7 ARMS phase current and an inverter efficiency of 98.5% at 100kHz.

Figure 3 : GaN reference design power loss at 48V vs. three-phase RMS output current

Due to the high switching frequency and fast current control loop, the phase current is very close to a sinusoidal curve and shows less distortion. This minimizes torque ripple, audible noise, and provides the highest efficiency. Figure 4 shows the relationship between the current waveform and the applied PWM voltage.

Figure 4 : 1kHz sinusoidal phase current has lower distortion using 100kHz PWM

We are eager to see what innovative new application engineers can create by harnessing the power of this new technology.

Additional Information

This post is from Analogue and Mixed Signal

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