Common impedance matching methods

fish001

Common impedance matching methods [Copy link]

1. Series terminal matching When the impedance of the signal source end is lower than the characteristic impedance of the transmission line, a resistor R is connected in series between the source end of the signal and the transmission line to match the output impedance of the source end with the characteristic impedance of the transmission line, thereby suppressing the re-reflection of the signal reflected from the load end. The matching resistor selection principle: The sum of the matching resistor value and the output impedance of the driver is equal to the characteristic impedance of the transmission line. The output impedance of common CMOS and TTL drivers will change with the level of the signal. Therefore, for TTL or CMOS circuits, it is impossible to have a very correct matching resistor, and only a compromise can be considered. The signal network with a chain topology is not suitable for series terminal matching, and all loads must be connected to the end of the transmission line. Series matching is the most commonly used terminal matching method. Its advantages are low power consumption, no additional DC load to the driver, no additional impedance between the signal and the ground, and only one resistor element is required. Common applications: impedance matching of general CMOS and TTL circuits. USB signals are also sampled using this method for impedance matching. 2. Parallel Terminal Matching When the impedance of the signal source end is very small, the input impedance of the load end is matched with the characteristic impedance of the transmission line by adding a parallel resistor, so as to eliminate the reflection at the load end. The implementation forms are divided into two forms: single resistor and double resistor. The principle of matching resistor selection: When the input impedance of the chip is very high, for the single resistor form, the parallel resistance value of the load end must be close to or equal to the characteristic impedance of the transmission line; for the dual resistor form, the value of each parallel resistor is twice the characteristic impedance of the transmission line. The advantage of parallel terminal matching is that it is simple and easy to implement, and the obvious disadvantage is that it will bring DC power consumption: the DC power consumption of the single resistor method is closely related to the duty cycle of the signal; the dual resistor method has DC power consumption regardless of whether the signal is high or low, but the current is half that of the single resistor method. Common applications: High-speed signal applications are more common. (1) SSTL drivers such as DDR and DDR2. A single resistor is used in parallel to VTT (generally half of IOVDD). The parallel matching resistor for DDR2 data signals is built into the chip. (2) High-speed serial data interface such as TMDS. It adopts a single resistor form, connected in parallel to IOVDD at the receiving device end, and the single-ended impedance is 50 ohms (100 ohms between differential pairs).