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74 series chip data inverter driver LS04 LS05 LS06 LS07 LS125 LS240 LS244 LS245 AND gate NAND gate LS00 LS08 LS10 LS11 LS20 LS21 LS27 LS30 LS38 OR gate NOR gate AND-NOR gate LS02 LS32 LS51 LS64 LS65 XOR gate comparator LS86 decoder LS138 LS139 register LS74 LS175 LS373 inverter: Vcc 6A 6Y 5A 5Y 4A 4Y Six NOT gate 74LS04 ┌┴─┴─┴─┴─┴─┴─┴┐ Six NOT gate (OC gate) 74LS05 _ │14 13 12 11 10 9 8│ Six NOT gates (OC high voltage output) 74LS06 Y = A ) │ │ 1 2 3 4 5 6 7│ └┬─┬─┬─┬─┬─┬─┬┘ 1A 1Y 2A 2Y 3A 3Y GND driver: Vcc 6A 6Y 5A 5Y 4A 4Y ┌┴─┴─┴─┴─┴─┴─┴┐ │14 13 12 11 10 9 8│ Y = A ) │ Six drivers (OC high voltage output) 74LS07 │ 1 2 3 4 5 6 7│ └┬─┬─┬─┬─┬─┬─┬┘ 1A 1Y 2A 2Y 3A 3Y GND Vcc -4C 4A 4Y -3C 3A 3Y ┌┴─┴─┴─┴─┴─┴─┴┐ _ │14 13 12 11 10 9 8│ Y =A+C ) │ Four-bus three-state gate 74LS125 │ 1 2 3 4 5 6 7│ └┬─┬─┬─┬─┬─┬─┬┘ -1C 1A 1Y -2C 2A 2Y GND Vcc -G B1 B2 B3 B4 B8 B6 B7 B8 ┌┴─┴─┴─┴─┴─┴─┴─┴─┴─┴┐ 8-bit bus driver 74LS245 │20 19 18 17 16 15 14 13 12 11│ ) │ DIR=1 A=>B │ 1 2 3 4 5 6 7 8 9 10│ DIR=0 B=>A └┬─┬─┬─┬─┬─┬─┬─┬─┬─┬─┬┘ DIR A1 A2 A3 A4 A5 A6 A7 A8 GND Top NOT gate, driver AND gate, NAND gate OR gate, NOR gate XOR gate, comparator Decoder Register positive logic AND gate, NAND gate: Vcc 4B 4A 4Y 3B 3A 3Y ┌┴─┴─┴─┴─┴─┴─┴┐ │14 13 12 11 10 9 8│ Y = AB ) │ 2-input four-positive AND gate 74LS08 │ 1 2 3 4 5 6 7│ └┬─┬─┬─┬─┬─┬─┬┘ 1A 1B 1Y 2A 2B 2Y GND Vcc 4B 4A 4Y 3B 3A 3Y ┌┴─┴─┴─┴─┴─┴─┴┐ __ │14 13 12 11 10 9 8│ Y = AB ) │ 2-input four-positive-AND gate 74LS00 │ 1 2 3 4 5 6 7│ └┬─┬─┬─┬─┬─┬─┬┘ 1A 1B 1Y 2A 2B 2Y GND Vcc 1C 1Y 3C 3B 3A 3Y ┌┴─┴─┴─┴─┴─┴─┴┐ ___ │14 13 12 11 10 9 8│ Y = ABC ) │ 3-input three-positive-AND gate 74LS10 │ 1 2 3 4 5 6 7│ └┬─┬─┬─┬─┬─┬─┬┘ 1A 1B 2A 2B 2C 2Y GND Vcc H G Y ┌┴─┴─┴─┴─┴─┴─┴┐ │14 13 12 11 10 9 8│ ) │ 8-input NAND gate 74LS30 │ 1 2 3 4 5 6 7│ ________ └┬─┬─┬─┬─┬─┬─┬┘ Y = ABCDEFGH A B C D E F GND Top NOT gate, driver AND gate, NAND gate OR gate, NOR gate XOR gate, comparator Decoder Register positive logic OR gate, NOR gate: Vcc 4B 4A 4Y 3B 3A 3Y ┌┴─┴─┴─┴─┴─┴─┴┐ 2-input quad OR gate 74LS32 │14 13 12 11 10 9 8│ ) │ Y = A+B │ 1 2 3 4 5 6 7│ └┬─┬─┬─┬─┬─┬─┬┘ 1A 1B 1Y 2A 2B 2Y GND Vcc 4Y 4B 4A 3Y 3B 3A ┌┴─┴─┴─┴─┴─┴─┴┐ 2-input quad-NOR gate 74LS02 │14 13 12 11 10 9 8│ ___ ) │ Y = A+B │ 1 2 3 4 5 6 7│ └┬─┬─┬─┬─┬─┬─┬┘ 1Y 1A 1B 2Y 2A 2B GND Vcc 2Y 2B 2A 2D 2E 1F ┌┴─┴─┴─┴─┴─┴─┴┐ Double AND-OR gate 74S51 │14 13 12 11 10 9 8│ _____ ) │ 2Y = AB+DE │ 1 2 3 4 5 6 7│ _______ └┬─┬─┬─┬─┬─┬─┬┘ 1Y = ABC+DEF 1Y 1A 1B 1C 1D 1E GND Vcc D C B K J Y ┌┴─┴─┴─┴─┴─┴─┴┐ 4-2-3-2 AND-OR gate 74S64 74S65 (OC gate) │14 13 12 11 10 9 8│ ______________ ) │ Y = ABCD+EF+GHI+JK │ 1 2 3 4 5 6 7│ └┬─┬─┬─┬─┬─┬─┬┘ A E F G H I GND Page top NOT gate, driver AND gate, NAND gate OR gate, NOR gate XOR gate, comparator Decoder Register 2 input four XOR gate 74LS86 Vcc 4B 4A 4Y 3Y 3B 3A ┌┴─┴─┴─┴─┴─┴─┴┐ │14 13 12 11 10 9 8│ ) │ _ _ │ 1 2 3 4 5 6 7│ Y=AB+AB └┬─┬─┬─┬─┬─┬─┬┘ 1A 1B 1Y 2Y 2A 2B GND 8*2 input comparator 74LS688 _ Vcc Y B8 A8 B7 A7 B6 A6 B5 A5 ┌┴─┴─┴─┴─┴─┴─┴─┴─┴─┴┐ 8*2 input comparator 74LS688 │20 19 18 17 16 15 14 13 12 11│ ) │ │ 1 2 3 4 5 6 7 8 9 10│ └┬─┬─┬─┬─┬─┬─┬─┬─┬─┬┘ CE A1 B1 A2 B2 A3 B3 A4 B4 GND _ Y=A1⊙B1+A2⊙B2+A3⊙B3+A4⊙B4+A5⊙B5+A6⊙B6+A7⊙B7+A8⊙B8 Top NOT gate, driver AND gate, NAND gate OR gate, NOR gate XOR gate, comparator Decoder Register 8*2 input comparator 74LS688 _ Vcc Y B8 A8 B7 A7 B6 A6 B5 A5 ┌┴─┴─┴─┴─┴─┴─┴─┴─┴─┴┐ 8*2 input comparator 74LS688 │20 19 18 17 16 15 14 13 12 11│ ) │ │ 1 2 3 4 5 6 7 8 9 10│ └┬─┬─┬─┬─┬─┬─┬─┬─┬─┬┘ CE A1 B1 A2 B2 A3 B3 A4 B4 GND_ Y=A1⊙B1+A2⊙B2+A3⊙B3+A4⊙B4+A5⊙B5+A6⊙B6+A7⊙B7+A8⊙B8 Register: Vcc 2CR 2D 2Ck 2St 2Q -2Q ┌┴─┴─┴─┴─┴─┴─┴┐ Dual D flip-flop 74LS74 │14 13 12 11 10 9 8 │ ) │ │ 1 2 3 4 5 6 7│ └┬─┬─┬─┬─┬─┬─┬┘ 1Cr 1D 1Ck 1St 1Q -1Q GND Vcc 8Q 8D 7D 7Q 6Q 6D 5D 5Q ALE ┌┴─┴─┴─┴─┴─┴─┴─┴─┴─┴┐ 8-bit latch 74LS373 │20 19 18 17 16 15 14 13 12 11│ ) │ │ 1 2 3 4 5 6 7 8 9 10│ └┬─┬─┬─┬─┬─┬─┬─┬─┬─┬─┬┘ -OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND