Application Skills/W78E516 and Its Implementation of In-System Programming

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Application Skills/W78E516 and Its Implementation of In-System Programming [Copy link]

	Abstract : In recent years, the continuous development and maturity of system programming (ISP) technology has made hardware design gradually software-oriented, the versatility of hardware structure has been increasingly enhanced, and profound changes have taken place in system design, production, maintenance, and upgrades. This article takes WINBOND's W78E516 as an example to introduce the structure of ISP devices and their principles in system programming.
	Keywords : W78E516 In-system programming microcontroller
	There are many inconveniences in reprogramming the CPU using traditional methods. The emergence of in-system programming technology (hereinafter referred to as ISP technology) is a breakthrough in traditional programming methods. ISP (In System Programming) technology refers to the ability to program or repeatedly program devices in the target system designed by the user or on the printed circuit board to reconfigure logic or realize new functions. The emergence and development of ISP technology has opened a new chapter in digital electronic system design technology. ISP technology does not require a programmer and a higher programming voltage, breaking the convention of programming first and then assembling. After the product is formed, it can be repeatedly programmed in the system, so that the advantages of microcontrollers with MTP-ROM that can be programmed multiple times or repeatedly can be more fully utilized. Especially in the Internet era, according to the system environment and needs, the system can be remotely upgraded and debugged through software control through a modem, serial port or a dedicated programming interface, improving the adaptability of the product, extending the product life cycle, and achieving significant economic benefits. The era of true programmable systems is coming.
	1. Structure of W78E516
	W78E516 is an 8-bit microcontroller with an in-system programmable MTP-ROM for system updates. W78E516 is fully compatible with the standard 8052.
	1. Features
	(1) Fully static design, maximum operating frequency is 40MHz.
	(2) 64KB APROM stores application programs and 4KB LDROM stores programs that control ISP operations. Both memories are MTP-ROM
	(3) 512 bytes of on-chip RAM (including 256 bytes of AUX-RAM, selectable by software) The internal data RAM has 512 bytes. It is divided into two storage units: 256 bytes of high-speed temporary memory and 256 bytes of auxiliary memory. These addresses are determined in different ways:
	① RAM 0H~127H: Direct or indirect addressing like 8052, the address pointer is R0 and R1 in the selected register unit.
	② RAM 128H~255H: Like 8052, it can only be addressed indirectly, and the address pointer is R0 and R1 in the selected register unit.
	③ AUX-RAM 0H~255H: Indirect addressing is performed using external data memory, using the MOVX instruction. The address pointer is the R0 and R1 of the selected register unit and the DPTR register. After the 4th bit in the CHCON register is set, AUX-RAM is valid, and the "MOVX@Ri" instruction is used to access AUX-RAM. When executing instructions from the internal program memory, accessing AUX-RAM will not affect P0, P2, WR and RD. AUX-RAM becomes invalid after reset.
	(4) The addressable space range of program memory and data memory is 64KB.
	(5) Four 8-bit bidirectional ports: P0~P3, and one 4-bit bidirectional multi-purpose programming port P4.
	(6) Three 16-bit timer/counters: T0, T1, and T2. The functions of T0 and T1 are the same as those of 8051. T2 is a 16-bit timer/counter, which is configured and controlled by T2CON. T2 can be used as an external clock counter or an internal timer, depending on the configuration of the C/T2 bit in T2CON. T2 has three operating modes: clear, auto-rewrite, and baud rate generator. In clear and auto-rewrite modes, the clock frequency is the same as that of T0 and T1.
	(7) Has a full-duplex serial port.
	(8) It has 6 interrupt sources and 2-level interrupt capability.
	(9) Internal power management: Idle mode and power-down mode, both of which can be selected by software.
	(10) It has the function of coding protection after programming.
	2. Special function registers related to ISP operation
	(1) The functions of the in-system programming control register CHPCON (BFH) are listed in Table 1.
	(2) The functions of the control byte register SFRCN (C7H) of the MTP-ROM in the programming state are listed in Table 2.
	(3) SFRAH, SFRAL: target address in system programming state. SFRAH contains the high byte of the address; SFRAL contains the low byte of the address (4) SFRFD: programming data of MTP-ROM in programming state.
	2. In-system programming method of W78E516
	1. ISP operation implementation process
	The microcontroller usually executes the program in APROM. If the program in APROM needs to be modified, the user needs to activate the in-system programming mode by setting the CHPCON register. By default, CHPCON is read-only. You must write #87H and #59H to the register in sequence to make the write feature of CHPCON effective. After activating the write feature of CHPCON, set its 0 bit to enter the in-system programming mode. ISP operations include entering/exiting the in-system programming mode, programming, erasing, reading, etc., which are completed when the CPU is in idle mode. Therefore, after setting the CHPCON register, the CPU enters the idle mode, and the time for executing each ISP operation is controlled by the occurrence of the timer interrupt. When the timer interrupt arrives, it is transferred to the LDROM to execute the relevant interrupt service routine. After the first execution of the RETI instruction, the PC pointer is cleared to 00H in the LDROM. When the contents in the APROM are completely updated, set the 0th, 1st, and 7th bits of CHPCON to logic 1, and return to the APROM to execute the new program in it through software reset. In the case where the application needs to be updated frequently, this in-system programming method makes the work simple and efficient.
	By default, W78E516 starts from the program after power-on reset. In some cases, W78E516 can be started from LDROM. When the program in APROM cannot run normally and W78E516 cannot jump to LDROM to perform ISP operation, the CPU enters F04KBOOT mode. In the application system design, it is important to pay attention to the values of P2, P3, ALE, EA and PSEN pins at reset to avoid accidentally activating programming mode or F04KBOOT mode. The P4?3, P2.7, P2.6 pin levels and timing when entering F04KBOOT MODE at reset are shown in Figures 1 and 2.
	When W78E516 is in the system programming mode, the MTP-ROM can be repeatedly programmed and verified. After the new code is completely and correctly written to the MTP-ROM, the new code is protected. W78E516 has a special setting register group (special setting registers), including security registers and company/device ID registers, which cannot be accessed in programming mode. The address of the security register in the LDROM space is 0FFFFH. When its bits are programmed from 1 to 0, they can no longer be changed. The only way to reset them is to perform a full erase operation, which can ensure their security.
	Generally speaking, microcontrollers with ISP functions usually have two program storage areas (temporarily called A-ROM and B-ROM), where A-ROM is used to store application programs under normal conditions, and B-ROM is used to store programs that control ISP operations, and new code is written to A-ROM. In some microcontrollers, the program codes in both A-ROM and B-ROM can control ISP operations, and one of them is selected by a special function register, providing designers with flexible design application space. For different types of ISP devices, the methods for in-system programming of the CPU have something in common.
	When executing ISP operation, the program flow charts in the two program memories are shown in Figure 3 and Figure 4 respectively.
	2. ISP features of W78E516
	Among MTP products, W78E516 is quite unique. It has outstanding advantages in ISP function:
	(1) Development flexibility. Designers can customize any programming communication protocol and send the program to be modified to the microcontroller through any I/O port or UART port via a computer or simple tools. Unlike other chips with ISP function, it must be implemented for its specific pins and special TIMMING protocol.
	(2) Operation continuity. The MCU with ISP function currently on the market must stop other operations when performing ISP operation (without accessories); however, some applications hope that the UART or TIMER/COUNTER functions can still operate at this time. W78E516 can meet this requirement. Because when performing ISP operation, only the control right is transferred from 64KB APROM to 4KB LDROM, the program in 4KB can still continue to operate and control.
	(3) Capable of storing data when power is off. Since W78E516 has two flash memories of different sizes, one of which can be used to store data that must be retained by the microcontroller after power is off, designers can reduce the circuit and cost of external EE2PROM chips. In addition to the above features, W78E516 does not require any accessories when performing ISP operations, which is popular with users.
	3. Application Examples
	This example is an experiment of ISP operation on W78E516 in the locomotive fault detection recorder system. This is a master-slave system composed of a PC and a microcontroller. The PC downloads the binary code of the new program in the form of data via serial communication, and the microcontroller receives the data and updates the program code in the 64KB APROM under software control. In the experiment, the microcontroller receives data via the RS-232 interface and temporarily stores it in the internal AUX-RAM. There is no need to expand the external data memory, saving board space. The communication between the detection recorder and the PC adopts the RS-232 standard. In order to simplify the hardware, only the TXD, RXD and ground wires in the standard are used, and the level conversion is completed by the MAXIM232 dedicated chip. The schematic diagram of the experimental circuit is shown in Figure 5.
	The software for implementing ISP operation consists of two parts: one is the microcontroller part (including the programs in APROM and LDROM), which is written in MCS-51 assembly language; the other is the PC part, which is developed by Microsoft Visual Basic and mainly uses the MSCOMM control to communicate with W78E516 to complete data download.
	After the microcontroller is powered on, it is usually started from the 64KB APROM. The 64KB APROM includes the in-system programming subroutine and other subroutines for detecting and recording the system. The microcontroller must read the input of the dial to decide which working state to enter and whether to perform in-system programming. It is worth noting that when writing the CHPCON register, its 4th position should be set to 1 to make AUX-RAM effective; the program in the 64KB APROM should always include the program segment shown in the flow chart of Figure 3 so that the system has the ability to enter the next in-system programming. The main function of the program in the 4KB LDROM is to receive the downloaded data from the PC and control various ISP operations. When executing in-system programming, the special function registers SFRAL, SFRAH, SFRFD, and SFRCN are used to select the address unit for in-system programming, prepare the data to be written, and select the type of operation to be performed. When starting from F04BOOT mode, the software reset fails and a hardware reset is required. The data for in-system programming is entered through the serial communication port that can still work normally during this period. This part of the process is shown in Figure 6.
	The PC sends data through the RS-232 serial port. The first three bytes of each frame are 7EH, which serves as the frame synchronization signal. The following two bytes are the frame pointer, which indicates the frame number of the current frame data. After sending a frame of data, the PC waits for the microcontroller to send back a confirmation data frame, which should include a flag indicating whether the data is received correctly and the frame number of the received data. The data frame format and the PC communication software flow are shown in Figures 7 and 8 respectively.
	Conclusion
	According to the method introduced in this paper, the in-system programming of W78E516 is realized in the locomotive fault detection recorder system.
	The high flexibility of ISP technology enables the same hardware structure to realize multiple system functions and become multifunctional hardware, which reduces the variety of circuit boards required by the system and simplifies the production process; multifunctional hardware can also reduce the number of components on the board and the number of system circuit boards, significantly reducing the system cost. In the locomotive system, various different tests need to be performed on each part, such as axle temperature, axle speed, and the opening and closing status of the door, etc., in order to understand the operating status of the locomotive. At this stage, it is necessary to design and produce a variety of different modules to process these analog or digital quantities. After the application of ISP technology, this situation will be changed: designers design universal modules including microcontrollers, A/D and D/A conversion chips, I/O ports, etc., install them in various parts that need to be tested, and then use ISP technology to download different applications to the microcontroller, so that various test functions can be completed. Its comprehensive economic benefits cannot be underestimated. In addition, ISP technology has also brought changes to many other fields. In short, in-system programming technology has broad development and application prospects.