Get accurate, fast and stable analog voltage from digital PWM signal

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Get accurate, fast and stable analog voltage from digital PWM signal [Copy link]

Pulse Width Modulation (PWM) is a common method to generate analog voltages from digital devices such as microcontrollers or FPGAs. Most microcontrollers have built-in dedicated PWM generation peripherals, and it only takes a few lines of RTL code to generate a PWM signal from an FPGA. If the performance requirements of the analog signal are not too stringent, this is a simple and practical method because it only requires one output pin and the code overhead is very low compared to a digital-to-analog converter (DAC) with an SPI or I2C interface. Figure 1 shows a typical application that uses a filtered digital output pin to generate an analog voltage.
　　

　　Figure 1: PWM to analog conversion
　　You don’t have to look too far to see the many shortcomings of this approach. Ideally, a 12-bit analog signal should have less than 1LSB of ripple, so a 1.2Hz low-pass filter is required for a 5kHz PWM signal. The impedance of the voltage output is determined by the filter resistor, which is quite large if a reasonable size filter capacitor is to be maintained. Therefore, the output must only drive a high-impedance load. The slope (gain) of the PWM to analog conversion function is determined by the (most likely inaccurate) digital supply voltage of the microcontroller. A more subtle effect is that to maintain linearity, the effective resistance of the digital output pin connected to the supply in the high state, and to ground in the low state, must be small compared to the value of the filter resistor. Finally, the PWM signal must be continuous in order to keep the output voltage at a constant value, which may be a problem if the processor is placed in a low-power shutdown state. Has PWM to analog conversion been improved? Figure 2 shows an attempt to compensate for these shortcomings. An output buffer allows a low impedance analog output while using a high impedance filter resistor. Gain accuracy is improved by using an external CMOS buffer powered by a precision reference so that the PWM signal swings between ground and an accurate high level. This circuit is useful, but has the disadvantages of high component count and no way to improve the 1.1 second settling time, nor is there a way to "hold" the analog value without using a continuous PWM signal.
　

　　Figure 2: Has PWM to Analog Conversion Been Improved?
　　Next Page: Improved PWM to Analog Conversion Improved PWM to Analog Conversion! The LTC2644 and LTC2645 are dual and quad PWM to voltage output DACs with an internal 10ppm/°C reference that provide true 8-, 10- or 12-bit performance from digital PWM signals. The LTC2644 and LTC2645 overcome the problems mentioned above by directly measuring the duty cycle of the input PWM signal and sending the appropriate 8-, 10- or 12-bit code to a high precision DAC on each rising edge. An internal 1.25V reference sets the full-scale output to 2.5V, and an external reference can be used if a different full-scale output is required. A separate IOVCC pin sets the digital input level, allowing direct connection to 1.8V FPGAs, 5V microcontrollers, or any voltage in between. DC accuracy specifications are excellent, with 5mV offset, 0.8% maximum gain error, and 2.5LSB (12-bit) maximum INL. The output settles in 8μs from the rising edge of the PWM input to within 0.024% of the final value (1LSB at 12 bits). For the 12-bit version, the PWM frequency range is 30Hz to 6.25kHz.

　　Figure 3: 4-Channel PWM-to-Analog Conversion
　　(Click for larger image)
　　Versatile Output Modes Figure 4 shows a typical supply trimming/margining application circuit that exploits another unique feature of the LTC2644. Tying IDLSEL high selects “sample/hold” operation; the output is high impedance (no margining) at startup, a continuous high on the input causes the output to hold its value indefinitely, and a continuous low places the output in a high impedance state. Thus, a burst of PWM pulses followed by a high can be used to trim the supply once at power-up. Pulling the PWM signal low allows the circuit to exit margining cleanly. Tying IDLSEL to GND selects “transparent mode,” in which a continuous high on the input sets the output to full scale, while a continuous low sets the output to zero scale.
　

　　Figure 4: Margining Application Circuit
　　Conclusion If you encounter the limitations of typical PWM-to-analog conversion methods, don’t despair. The LTC2645 generates accurate, fast settling analog signals from pulse width modulated digital outputs while keeping component count low and code simple.