EPM7032LC44-12 datasheet, PDF - EEWORLD Datasheet

EPM7032LC44-12: DescriptionEE PLD, 7.5 ns, PQCC84; CategoryProgrammable logic devices Programmable logic; File Size451KB，62 Pages; ManufacturerAltera (Intel)

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EPM7032LC44-12 Overview

EE PLD, 7.5 ns, PQCC84

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	incompatible
Maker	Altera (Intel)
Parts packaging code	LCC
package instruction	QCCJ, LDCC44,.7SQ
Contacts	44
Reach Compliance Code	compli
Samacsys Descripti	IC CPLD 32MC 12NS 44PLCC
Other features	LABS INTERCONNECTED BY PIA; 2 LABS; 32 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
maximum clock frequency	125 MHz
In-system programmable	NO
JESD-30 code	S-PQCC-J44
JESD-609 code	e0
JTAG BST	NO
length	16.5862 mm
Dedicated input times
Number of I/O lines	36
Number of macro cells	32
Number of terminals	44
Maximum operating temperature	70 °C
Minimum operating temperature
organize	0 DEDICATED INPUTS, 36 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC44,.7SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	245
power supply	5 V
Programmable logic type	EE PLD
propagation delay	12 ns
Certification status	Not Qualified
Maximum seat height	4.572 mm
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	16.5862 mm

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