MC74LVX374
Octal D-Type Flip-Flop
with 3-State Outputs
With 5V−Tolerant Inputs
The MC74LVX374 is an advanced high speed CMOS octal D−type
flip−flop with 3−state outputs. The inputs tolerate voltages up to 7.0 V,
allowing the interface of 5.0 V systems to 3.0 V systems.
This 8−bit D−type flip−flop is controlled by a clock input and an
output enable input. When the output enable input is high, the eight
outputs are in a high impedance state.
Features
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SOIC−20
DW SUFFIX
CASE 751D
TSSOP−20
DT SUFFIX
CASE 948E
•
•
•
•
•
•
•
•
High Speed: f
max
= 160 MHz (Typ) at V
CC
= 3.3 V
Low Power Dissipation: I
CC
= 4
mA
(Max) at T
A
= 25°C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Low Noise: V
OLP
= 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
•
These Devices are Pb−Free and are RoHS Compliant
20
PIN ASSIGNMENT
V
CC
O7 D7
20 19 18
D6 O6 O5 D5
17 16 15 14
D4 O4
13 12
CP
11
1
2
3
4
5
6
7
8
9
10
OE O0 D0
D1 O1 O2 D2
20−Lead
(Top View)
D3 O3 GND
MARKING DIAGRAMS
20
LVX374
AWLYYWWG
1
SOIC−20
LVX374
A
WL, L
Y
WW, W
G or
G
1
TSSOP−20
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
LVX
374
ALYWG
G
(Note: Microdot may be in either location)
PIN NAMES
Pins
OE
CP
D0−D7
O0−O7
Function
Output Enable Input
Clock Pulse Input
Data Inputs
3−State Outputs
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
©
Semiconductor Components Industries, LLC, 2014
1
August, 2014 − Rev. 4
Publication Order Number:
MC74LVX374/D
MC74LVX374
OE
CP
1
11
nCP
Q
D
5
Q
D
6
Q
D
9
Q
D
nCP
Q
D
15
Q
D
nCP
Q
D
19
Q
D
O7
16
O6
O5
12
O4
O3
O2
O1
2
O0
3
D0
4
D1
nCP
7
D2
nCP
8
D3
nCP
13
D4
14
D5
nCP
17
D6
18
D7
nCP
Figure 1. Logic Diagram
INPUTS
OE
L
L
L
H
H
H
CP
↑
↑
↑
↑
↑
↑
Dn
l
h
X
X
l
h
OUTPUTS
On
L
H
NC
Z
Z
Z
OPERATING MODE
Load and Read Register
Hold and Read Register
Hold and Disable Outputs
Load Internal Register and Disable Outputs
H = High Voltage Level; h = High Voltage Level One Setup Time Prior to the Low−to−High Clock Transition; L = Low
Voltage Level; l = Low Voltage Level One Setup Time Prior to the Low−to−High Clock Transition; NC = No Change,
State Prior to Low−to−High Clock Transition; X = High or Low Voltage Level and Transitions are Acceptable; Z = High
Impedance State;
↑
= Low−to−High Transition;
↑
= Not a Low−to−High Transition; For I
CC
Reasons DO NOT FLOAT
Inputs
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2
MC74LVX374
MAXIMUM RATINGS
Symbol
V
CC
V
in
V
out
I
IK
I
OK
I
out
I
CC
P
D
T
stg
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current, per Pin
DC Supply Current, V
CC
and GND Pins
Power Dissipation
Storage Temperature
Parameter
Value
–0.5 to +7.0
–0.5 to +7.0
–0.5 to V
CC
+0.5
−20
±20
±25
±75
180
–65 to +150
Unit
V
V
V
mA
mA
mA
mA
mW
_C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
in
V
out
T
A
Dt/DV
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Temperature, All Package Types
Input Rise and Fall Time
Parameter
Min
2.0
0
0
−40
0
Max
3.6
5.5
V
CC
+85
100
Unit
V
V
V
_C
ns/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
V
CC
V
2.0
3.0
3.6
2.0
3.0
3.6
I
OH
= −50
mA
I
OH
= −50
mA
I
OH
= −4 mA
I
OL
= 50
mA
I
OL
= 50
mA
I
OL
= 4 mA
V
in
= 5.5 V or GND
V
in
= V
IL
or V
IH
V
out
= V
CC
or GND
V
in
= V
CC
or GND
2.0
3.0
3.0
2.0
3.0
3.0
3.6
3.6
3.6
1.9
2.9
2.58
2.0
3.0
0.0
0.0
0.1
0.1
0.36
±0.1
±0.2
5
4.0
T
A
= 25°C
Min
1.5
2.0
2.4
0.5
0.8
0.8
1.9
2.9
2.48
0.1
0.1
0.44
±1.0
±2.5
40.0
Typ
Max
T
A
= −40 to 85°C
Min
1.5
2.0
2.4
0.5
0.8
0.8
Max
Unit
V
Symbol
V
IH
Parameter
High−Level Input Voltage
Test Conditions
V
IL
Low−Level Input Voltage
V
V
OH
High−Level Output Voltage
(V
in
= V
IH
or V
IL
)
Low−Level Output Voltage
(V
in
= V
IH
or V
IL
)
Input Leakage Current
Maximum 3−State Leakage Current
Quiescent Supply Current
V
V
OL
V
I
in
I
OZ
I
CC
mA
mA
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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3
MC74LVX374
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3.0ns)
T
A
= 25°C
Symbol
f
max
Parameter
Maximum Clock Frequency
(50% Duty Cycle)
Test Conditions
V
CC
= 2.7 V
V
CC
= 3.3
±
0.3 V
t
PLH
,
t
PHL
Propagation Delay
CP to O
V
CC
= 2.7 V
V
CC
= 3.3
±
0.3 V
t
PZL
,
t
PZH
Output Enable Time
OE to O
V
CC
= 2.7 V
R
L
= 1 kW
V
CC
= 3.3
±
0.3 V
R
L
= 1 kW
t
PLZ
,
t
PHZ
Output Disable Time
OE to O
V
CC
= 2.7 V
R
L
= 1 kW
V
CC
= 3.3
±
0.3 V
R
L
= 1 kW
t
OSHL
t
OSLH
Output−to−Output Skew
(Note 1)
V
CC
= 2.7 V
V
CC
= 3.3
±
0.3 V
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
C
L
= 50 pF
C
L
= 50 pF
C
L
= 50 pF
C
L
= 50 pF
Min
60
45
100
60
Typ
115
60
160
95
8.5
11.0
6.7
9.2
7.6
10.1
5.9
8.4
11.5
9.6
16.3
19.8
10.6
14.1
14.5
18.0
9.3
12.8
18.5
13.2
1.5
1.5
Max
T
A
= −40 to 85°C
Min
50
40
85
55
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
19.5
23.0
12.5
16.0
17.5
21.0
11.0
14.5
22.0
15.0
1.5
1.5
ns
ns
ns
ns
Max
Unit
MHz
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t
OSHL
) or LOW−to−HIGH (t
OSLH
); parameter
guaranteed by design.
CAPACITIVE CHARACTERISTICS
T
A
= 25°C
Symbol
Cin
C
out
C
PD
Input Capacitance
Maximum Three−State Output Capacitance
Power Dissipation Capacitance (Note 2)
Parameter
Min
Typ
4
6
32
Max
10
T
A
= −40 to 85°C
Min
Max
10
Unit
pF
pF
pF
2. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
/ 8 (per flip−flop). C
PD
is used to determine the
no−load dynamic power consumption; P
D
= C
PD
V
CC2
f
in
+ I
CC
V
CC
.
NOISE CHARACTERISTICS
(Input t
r
= t
f
= 3.0ns, C
L
= 50pF, V
CC
= 3.3V, Measured in SOIC Package)
T
A
= 25°C
Symbol
V
OLP
V
OLV
V
IHD
V
ILD
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
Characteristic
Typ
0.5
−0.5
Max
0.8
−0.8
2.0
0.8
Unit
V
V
V
V
TIMING REQUIREMENTS
(Input t
r
= t
f
= 3.0ns)
T
A
= 25°C
Symbol
t
w
t
su
t
h
Parameter
Minimum Pulse Width, CP
Minimum Setup Time, D to CP
Minimum Hold Time, D to CP
Test Conditions
V
CC
= 2.7 V
V
CC
= 3.3
±
0.3 V
V
CC
= 2.7 V
V
CC
= 3.3
±
0.3 V
V
CC
= 2.7 V
V
CC
= 3.3
±
0.3 V
Typ
Limit
7.5
5.0
6.5
4.5
2.0
2.0
T
A
= −40 to 85°C
Limit
8.0
5.5
6.5
4.5
2.0
2.0
Unit
ns
ns
ns
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4
MC74LVX374
SWITCHING WAVEFORMS
OE
V
CC
CP
50%
GND
t
W
1/f
max
t
PLH
O
50% V
CC
t
PHL
O
O
t
PZL
50% V
CC
V
OL
+0.3V
t
PZH
50% V
CC
t
PHZ
V
OH
-0.3V
HIGH
IMPEDANCE
t
PLZ
50%
GND
HIGH
IMPEDANCE
V
CC
Figure 2.
VALID
V
CC
D
50%
GND
t
su
t
h
V
CC
CP
50%
GND
Figure 3.
Figure 4.
TEST CIRCUITS
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
1 kW
CONNECT TO V
CC
WHEN
TESTING t
PLZ
AND t
PZL
.
CONNECT TO GND WHEN
TESTING t
PHZ
AND t
PZH
.
C
L
*
C
L
*
*Includes all probe and jig capacitance
*Includes all probe and jig capacitance
Figure 5. Propagation Delay Test Circuit
Figure 6. Three−State Test Circuit
ORDERING INFORMATION
Device
MC74LVX374DWR2G
MC74LVX374DTR2G
Package
SOIC−20
(Pb−Free)
TSSOP−20
(Pb−Free)
Shipping
†
1000 Tape & Reel
2500 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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