HANBit
HMS25632M8G/Z8
HAN
BIT
SRAM MODULE 1Mbyte (256K x 32-Bit)
Part No.
HMS25632M8, HMS25632Z8
GENERAL DESCRIPTION
The HMS25632M8G/Z8 is a high-speed static random access memory (SRAM) module containing 262,144
words organized in a x32-bit configuration. The module consists of eight 256K x 4 SRAMs mounted on a 64-pin,
double-sided, FR4-printed circuit board.
PD0 and PD1 identify the module’s density allowing interchangeable use of alternate density, industry- standard
modules. Four chip enable inputs, (/CE1, /CE2, /CE3 and /CE4) are used to enable the module’s 4 bytes
independently. Output enable (/OE) and write enable (/WE) can set the memory input and output.
Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW.
Reading is accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW.
For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be
powered from a single +5V DC power supply and all inputs and outputs are fully TTL-compatible.
FEATURES
Part Identification
-HMS25632M8G : 64Pin SIMM Design, Gold Plate Lead
-HMS25632Z8 : 64Pin ZIP Design
→
Pin-Compatible with the HMS25632M8G
PD0
DQ0
DQ1
DQ2
DQ3
Vcc
A7
A8
A9
DQ4
DQ5
DQ6
DQ7
/WE
A14
/CE1
/CE3
A16
Vss
DQ16
DQ17
DQ18
DQ19
A10
A11
A12
A13
DQ20
DQ21
DQ22
DQ23
Vss
PIN ASSIGNMENT
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
Vss
PD1
DQ8
DQ9
DQ10
DQ11
A0
A1
A2
DQ12
DQ13
DQ14
DQ15
Vss
A15
/CE2
/CE4
A17
/OE
DQ24
DQ25
DQ26
DQ27
A3
A4
A5
Vcc
A6
DQ28
DQ29
DQ30
DQ31
Access times: 8, 10, 12, 15and 20ns
High-density 1MByte design
High-reliability, high-speed design
Single + 5V
±0.5V
power supply
Easy memory expansion with /CE and /OE functions
All inputs and outputs are TTL-compatible
Industry-standard pinout
OPTIONS
Timing
8ns access
10ns access
12ns access
15ns access
20ns access
MARKING
- 8
-10
-12
-15
-20
M
Z
Packages
64-pin SIMM
64-pin ZIP
ZIP
TOP VIEW
PD0 = Vss
PD1 = Vss
1
HANBit Electronics Co.,Ltd.
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FUNCTIONAL BLOCK DIAGRAM
32
18
A0-17
DQ 0-3
/WE
/OE
HMS25632M8G/Z8
DQ0 - DQ31
A0 - A17
A0-17
DQ 4-7
/WE
/OE
U1
/CE
U5
/CE
/CE1
A0-17
DQ 8-11
/WE
/OE
/WE
A0-17
DQ12-15
/OE
U2
/CE
U6
/CE
/CE2
A0-17
DQ16-19
/WE
/OE
/WE
A0-17
DQ20-23
/OE
U3
/CE
U7
/CE
/CE3
A0-17
/WE
/OE
DQ24-27
/WE
/OE
/WE
A0-17
DQ28-31
/OE
U4
/CE
U8
/CE
/CE4
PRESENCE-DETECT
PD0 = Vss
PD1 = Vss
TRUTH TABLE
MODE
STANDBY
NOT SELECTED
READ
WRITE
/OE
X
H
L
X
/CE
H
L
L
L
/WE
X
H
H
L
OUTPUT
HIGH-Z
HIGH-Z
Dout
Din
POWER
STANDBY
ACTIVE
ACTIVE
ACTIVE
2
HANBit Electronics Co.,Ltd.
HANBit
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Voltage on Any Pin Relative to Vss
Voltage on Vcc Supply Relative to Vss
Power Dissipation
Storage Temperature
SYMBOL
V
IN,OUT
V
CC
P
D
T
STG
HMS25632M8G/Z8
RATING
-0.5V to Vcc+0.5V
-0.5V to +7.0V
8W
-65oC to +150oC
0oC to +70oC
Operating Temperature
T
A
Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
*
SYMBOL
V
CC
V
SS
V
IH
V
IL
MIN
4.5V
0
2.2
-0.5*
( TA=0 to 70 o C )
TYP.
5.0V
0
-
-
MAX
5.5V
0
Vcc+0.5V**
0.8V
V
IL
(Min.) = -2.0V (Pulse Width
≤
10ns) for I
≤
20 mA
**
V
IH
(Min.) = Vcc+2.0V (Pulse Width
≤
10ns) for I
≤
20 mA
DC AND OPERATING CHARACTERISTICS (1)
(0oC
≤
TA
≤
70 oC ; Vcc = 5V
±
0.5V )
PARAMETER
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
* Vcc=5.0V, Temp=25 oC
TEST CONDITIONS
V
IN
= Vss to Vcc
/CE=V
IH or /
OE =V
IH
or /WE=V
IL
V
OUT
=Vss to V
CC
I
OH
= -4.0Ma
I
OL
= 8.0mA
SYMBO
L
IL
I
IL
0
V
OH
V
OL
MIN
-2
-2
2.4
0.4
MAX
2
2
UNITS
µA
µA
V
V
DC AND OPERATING CHARACTERISTICS (2)
MAX
DESCRIPTION
Power Supply
Current: Operating
Power Supply
Current: Standby
TEST CONDITIONS
Min. Cycle, 100% Duty
/CE=V
IL
, V
IN
=V
IH
or V
IL
,
I
OUT
=0mA
Min. Cycle, /CE=V
IH
f=0MHZ, /CE≥V
CC
-0.2V,
V
IN
≥
V
CC
-0.2V or V
IN
≤0.2V
SYMBOL
I
CC
I
SB
I
SB1
-12
70
30
5
-15
68
30
5
-20
65
30
5
UNIT
mA
mA
mA
3
HANBit Electronics Co.,Ltd.
HANBit
CAPACITANCE
DESCRIPTION
Input /Output Capacitance
Input Capacitance
TEST CONDITIONS
V
I/O
=0V
V
IN
=0V
SYMBOL
C
I/O
C
IN
HMS25632M8G/Z8
MAX
8
6
UNIT
pF
pF
* NOTE
: Capacitance is sampled and not 100% tested
AC CHARACTERISTICS
(0oC
≤
TA
≤
70 oC ; Vcc = 5V
±
0.5V, unless otherwise specified)
TEST CONDITIONS
PARAMETER
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
VALUE
0 to 3V
3ns
1.5V
See below
Output
+5V
Load
Output Load (B)
for t
HZ
, t
LZ
, t
WHZ
, t
OW
, t
OLZ
& t
OHZ
+5V
480
Ω
D
OUT
255
Ω
30pF*
D
OUT
255
Ω
480
Ω
5pF*
READ CYCLE
-12
PARAMETER
Read Cycle Time
Address Access Time
Chip Select to Output
Output Enable to Output
Output Enable to Low-Z Output
Chip Enable to Low-Z Output
Output Disable to High-Z Output
Chip Disable to High-Z Output
Output Hold from Address Change
SYMBOL
MIN
MAX
MIN
MAX
MIN
MAX
-15
-20
UNIT
t
RC
t
AA
t
CO
t
OE
t
OLZ
t
LZ
t
OHZ
t
HZ
t
OH
12
12
12
6
0
3
0
0
3
6
6
15
15
15
7
0
3
0
0
3
7
7
20
20
20
9
0
3
0
0
3
9
9
ns
ns
ns
ns
ns
ns
ns
ns
ns
4
HANBit Electronics Co.,Ltd.
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Chip Select to Power Up Time
Chip Select to Power Down Time
t
PU
t
PD
-
-
12
0
HMS25632M8G/Z8
0
15
20
ns
ns
WRITE CYCLE
PARAMETER
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
Write Pulse Width
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End of Write to Output Low-Z
-12
SYMBOL
MIN
MAX
MIN
MAX
MIN
MAX
-15
-20
UNIT
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
12
8
0
8
8
0
0
6
0
3
6
15
9
0
9
9
0
0
7
0
3
7
20
10
0
10
10
0
0
8
0
5
9
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE
( Address Controlled) ( /CE = /OE = V
IL
, /WE = V
IH
)
t
RC
Address
t
AA
t
OH
Data out
Previous Data Valid
Data Valid
5
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