Preliminary Specification
N-Channel Dual-Gate MOSFET
□
Description
The TMF3202Z is an enhancement type N-channel field-effect
transistor. The source and substrate are interconnected. Internal
bias circuits enable DC stabilization and a very good cross-
modulation performance during AGC. Integrated diodes between
the gates and source protect against excessive input voltage
surges. The transistor has a SOT343 micro-miniature plastic
package.
TMF3202Z
SOT343
Unit in mm
2
3
1
4
□
Features
- Gain controlled amplifier with AGC
- Integrated gate protection diodes
- High AGC-range, high gain, low noise figure
□
Applications
- Gain controlled input stage for UHF and VHF tuners
- Professional communications equipment
1. SOURCE
2. DRAIN
3. GATE 2
4. GATE 1
□
Absolute Maximum Ratings
(T
a
= 25
℃)
Parameter
Drain-Source Voltage
Drain Current
Gate 1 Current
Total Power Dissipation
Storage Temperature
Operating Junction Temperature
Symbol
V
DS
I
D
I
G1
P
tot
T
stg
T
j
Ratings
10
30
±10
200
-65 ~ 150
150
Unit
V
mA
mA
mW
℃
℃
Caution
:
Electro Static Discharge
sensitive device, observe handling precaution
http://www.tachyonics.co.kr
October. 2005.
Page 1 of 8
Rev. 1.0
Preliminary Specification
□
DC Characteristics
( T
j
= 25
℃,
unless otherwise specified )
PARAMETER
Drain-source breakdown voltage
Gate1-source breakdown voltage
Gate2-source breakdown voltage
Forward source-gate1 voltage
Forward source-gate2 voltage
Gate1-source threshold voltage
Gate2-source threshold voltage
Drain-source current
Gate1 cut-off current
Gate2 cut-off current
SYMBOL
V
(BR)DSS
V
(BR)G1-SS
V
(BR)G2-SS
V
(F)S-G1
V
(F)S-G2
V
G1-S(th)
V
G2-S(th)
I
DSX
I
G1-S
I
G2-S
CONDITION
V
G1-S
=V
G2-S
=0; I
D
=10㎂
V
G2-S
=V
DS
=0; I
G1-S
=10㎃
V
G1-S
=V
DS
=0; I
G2-S
=10㎃
V
G2-S
=V
DS
=0; I
S-G1
=10㎃
V
G1-S
=V
DS
=0; I
S-G2
=10㎃
V
DS
=5V; V
G2-S
=4V; I
D
=100㎂
V
DS
=5V; V
G1-S
=4V; I
D
=100㎂
V
G2-S
=4V; V
DS
=5V; R
G
=62㏀
V
G1-S
=5V; V
G2-S
=V
DS
=0
V
G2-S
=5V; V
G1-S
=V
DS
=0
MIN.
10
6
6
0.5
0.5
0.3
0.3
8
-
-
TMF3202Z
MAX.
-
10
10
1.5
1.5
1.0
1.2
16
10
10
UNIT
V
V
V
V
V
V
V
㎃
㎁
㎁
□
AC Characteristics
( Common source; T
a
= 25
℃,
V
G2-S
= 4V, V
DS
=5V, I
D
=12mA ;unless otherwise specified )
PARAMETER
Forward transfer admittance
Input capacitance at gate1
Input capacitance at gate2
Output capacitance
Reverse transfer capacitance
SYMBOL
Iy
FS
I
C
ig1-ss
C
ig2-ss
C
oss
C
rss
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Tj=25℃
f=1MHz
f=1MHz
f=1MHz
f=1MHz
f=200MHz; Z
i
= S
11
, Z
o
= S
22
*
*
25
-
-
-
-
30
27
24
-
-
90
30
1.7
3.3
0.9
15
33
30
27
1.2
1.5
-
40
2.2
-
-
25
-
-
-
-
2.0
-
mS
㎊
㎊
㎊
fF
㏈
㏈
㏈
㏈
㏈
㏈㎶
Power gain
Gtr
f=400MHz; Z
i
= S
11*
, Z
o
= S
22*
f=800MHz; Z
i
= S
11*
, Z
o
= S
22*
f=400MHz; Z
i
= S
11 opt(NF)
Noise figure
NF
f=800MHz; Z
i
= S
11 opt(NF)
k=1%, fw=50MHz;
funw=60MHz AGC = 0dB
Cross-modulation
X
mod
k=1%, fw=50MHz;
funw=60MHz AGC = 10dB
k=1%, fw=50MHz;
funw=60MHz AGC = 40dB
-
92
-
㏈㎶
100
105
-
㏈㎶
http://www.tachyonics.co.kr
October. 2005.
Page 2 of 8
Rev. 1.0
Preliminary Specification
□
Equivalent circuit (Top view)
3
4
□
Making
3
TMF3202Z
4
2
tachyonics
X1
1
3
4
2
2
3
4
2
tachyonics
X2
1
DB1
2
1
1
1
Diode
DIODE2
1
Diode
DIODE1
2
□
Pin Configuration
PIN
1
2
3
DESCRIPTION
SOURCE
DRAIN
GATE2
GATE1
□
Test circuit
V_DC
VAGC
1
1
R
RAGC
R=10 kOhm
2
2
2
1
4
C
CAGC
C=4.7 nF
1
C
CD
C=4.7 nF
1
2
2
R
RL
R=50 Ohm
1
1
2
1
1
C
CDB
C=4.7 nF
1
C
CIN
C=4.7 nF
1
R
RSOURCE
R=50 Ohm
2
1
V_AC
SRC1
1
2
1
2
1
R
RIN
R=50 Ohm
R
RGB
R=68 kOhm
tachyonics
X2
1
V_DC
VGB
1
2
1
Diode
DIODE1
1
1
1
2
1
2
3
4
2
2
3
4
2
tachyonics
X1
1
2
L
LD
L=2.2 uH
2
1
Diode
DIODE2
2
1
V_DC
VDB
Fig1. Test Cross-modulation test set-up
http://www.tachyonics.co.kr
October. 2005.
Page 3 of 8
Rev. 1.0
Scattering parameters
Preliminary Specification
□
Graphs
TMF3202Z
ID [ m A ]
45
40
35
30
25
20
15
10
5
0
0.00
0.50
1.00
1.50
2.00
2V
VG2=4V
3.5V
3V
2.5V
ID [ m A ]
30
25
20
15
10
V G1-S : 1.5V
1.4V
1.3V
1.2V
1.1V
1V
0.9V
1.5V
5
1V
0
2.50
VG1-S [V]
0
1
2
3
4
5
6
V DS [V ]
7
V
DS
=5V, T
j
=
25
℃
Fig.2 Transfer characteristics
300
IG 1 [ u A ]
VG2=4V
3.5V
3V
V
G2-S
= 4V, T
j
=
25
℃
Fig3. Output characteristics
| y fs| [m S ]
250
40
35
30
25
4V
3.5V
3V
200
2.5V
150
2V
20
15
2.5V
100
1.5V
10
5
0
50
1V
V
G2-S
= 2V
0
4
8
12
16
20
ID [mA]
0
0.00
0.50
1.00
1.50
2.00
VG1-S [V]
2.50
V
DS
=5V, T
j
=
25
℃
Fig.4 Gate1 Current as a function of gate1 Voltage
V
DS
=5V, T
j
=
25
℃
Fig5. Forward transfer admittance as a function
of drain current
http://www.tachyonics.co.kr
October. 2005.
Page 4 of 8
Rev. 1.0
Preliminary Specification
TMF3202Z
□
Graphs
ID [ m A ]
ID [ m A ]
20
16
14
12
10
8
16
12
8
6
4
2
4
0
0
20
40
60
80
100
IG1 [uA]
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
VGG [V]
V
DS
= 5V, V
G2-S
= 4V, T
j
= 25
℃
Fig6. Drain current as a function of gate1 current
V
DS
= 5V, V
G2-S
= 4V, R
GB
=62㏀, T
j
= 25
℃
Fig7. Drain current as a function of gate1
supply voltage
18
16
14
12
10
8
6
4
2
0
0
1
2
3
4
R
G1
= 33KΩ
39KΩ
51KΩ
ID [ m A ]
ID [ m A ]
20
14
12
10
VGG = 5V
4.5V
4V
3.5V
3V
62KΩ
75KΩ
92KΩ
100KΩ
8
6
4
2
0
5
6
VGG=VDS [V]
0
1
2
3
4
5
6
VG2-S [V]
V
G2-S
= 4V, T
j
= 25
℃,
R
GB
= (Connected to VGG)
Fig8. Drain current as a function of gate1 and
drain supply voltage
;
see Fig1
V
DS
= 5V, T
j
= 25
℃,
R
GB
=62㏀
Fig9. Drain current as a function of gate2 voltage
http://www.tachyonics.co.kr
October. 2005.
Page 5 of 8
Rev. 1.0
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