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DM74ALS533 Octal D-Type Transparent Latch with 3-STATE Outputs
April 1984
Revised February 2000
DM74ALS533
Octal D-Type Transparent Latch with 3-STATE Outputs
General Description
These 8-bit registers feature totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or rela-
tively low-impedance loads. The high-impedance state and
increased high-logic-level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for inter-
face or pull-up components. They are particularly attractive
for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight inverting latches of the DM74ALS533 are trans-
parent D-type latches. While the enable (G) is HIGH the Q
outputs will follow the complement of the data (D) inputs.
When the enable is taken LOW the output will be latched at
the complement of the level of the data that was set up.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high-impedance state. In the high-imped-
ance state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the latches. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.
Features
s
Switching specifications at 50 pF
s
Switching specifications guaranteed over full tempera-
ture and V
CC
range
s
Advanced oxide-isolated, ion-implanted Schottky TTL
process
s
3-STATE buffer-type outputs drive bus lines directly
Ordering Code:
Order Number
DM74ALS533WM
DM74ALS533N
Package Number
M20B
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
© 2000 Fairchild Semiconductor Corporation
DS006222
www.fairchildsemi.com
DM74ALS533
Function Table
Output
Control
L
L
L
H
L
=
LOW State
H
=
HIGH State
X
=
Don’t Care
Z
=
High Impedance State
Q
0
=
Previous Condition of Q
Logic Diagram
D
H
L
X
X
Output
Q
L
H
Q
0
Z
Enable
G
H
H
L
X
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2
DM74ALS533
Absolute Maximum Ratings
(Note 1)
Supply Voltage
Input Voltage
Voltage Applied to Disabled Output
Operating Free Air Temperature Range
Storage Temperature Range
Typical
θ
JA
N Package
M Package
57.0°C/W
76.0°C/W
7V
7V
5.5V
0°C to
+70°C
−65°C
to
+150°C
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
t
W
t
SU
t
H
T
A
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Width of Enable Pulse, HIGH or LOW
Data Setup Time (Note 2)
Data Hold Time (Note 2)
Free Air Operating Temperature
15
15↓
7↓
0
70
Parameter
Min
4.5
2
0.8
−2.6
24
Nom
5
Max
5.5
Units
V
V
V
mA
mA
ns
ns
ns
°C
Note 2:
The (↓) arrow indicates the negative edge of the enable is used for reference.
Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at V
CC
=
5V, T
A
=
25°C.
Symbol
V
IK
V
OH
V
OL
I
I
I
IH
I
IL
I
O
I
OZH
I
OZL
I
CC
Parameter
Input Clamp Voltage
HIGH Level
Output Voltage
LOW Level
Output Voltage
Input Current @ Maximum
Input Voltage
HIGH Level Input Current
LOW Level Input Current
Output Drive Current
OFF-State Output Current
HIGH Level Voltage Applied
OFF-State Output Current
LOW Level Voltage Applied
Supply Current
V
CC
=
5.5V, V
IH
=
7V
V
CC
=
5.5V, V
IH
=
2.7V
V
CC
=
5.5V, V
IL
=
0.4V
V
CC
=
5.5V
V
CC
=
5.5V
V
O
=
2.7V
V
CC
=
5.5V
V
O
=
0.4V
V
CC
=
5.5V
Outputs OPEN
Outputs HIGH
Outputs LOW
Outputs Disabled
10
17
18.5
V
O
=
2.25V
−30
V
CC
=
4.5V
V
CC
=
4.5V to 5.5V
V
CC
=
4.5V
Conditions
V
CC
=
4.5V, I
I
= −18
mA
I
OH
= −2.6
mA
I
OH
= −400 µA
I
OL
=
12 mA
I
OL
=
24 mA
2.4
V
CC
−
2
0.25
0.35
0.4
0.5
0.1
20
−0.1
−112
20
−20
17
26
28
3.3
Min
Typ
Max
−1.5
Units
V
V
V
V
V
mA
µA
mA
mA
µA
µA
mA
mA
mA
3
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DM74ALS533
Switching Characteristics
over recommended operating free air temperature range
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Parameter
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Output Enable Time
to HIGH Level Output
Output Enable Time
to LOW Level Output
Output Disable Time
from HIGH Level Output
Output Disable Time
from LOW Level Output
Conditions
V
CC
=
4.5V to 5.5V
R
L
=
500Ω
C
L
=
50 pF
From
Data
To
Any Q
Min
4
Max
19
Units
ns
Data
Any Q
4
13
ns
Enable
Any Q
5
23
ns
Enable
Output
Control
Output
Control
Output
Control
Output
Control
Any Q
4
18
ns
Any Q
4
17
ns
Any Q
4
18
ns
Any Q
2
10
ns
Any Q
3
16
ns
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