74LS75B datasheet, PDF - EEWORLD Datasheet

74LS75B: DescriptionIC LS SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, PDIP16, FF/Latch; Categorylogic logic; File Size99KB，3 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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74LS75B Overview

IC LS SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, PDIP16, FF/Latch

Parameter Name	Attribute value
Maker	NXP
package instruction	,
Reach Compliance Code	unknown
series	LS
JESD-30 code	R-PDIP-T16
Load capacitance (CL)	15 pF
Logic integrated circuit type	D LATCH
Number of digits	2
Number of functions	2
Number of terminals	16
Maximum operating temperature	70 °C
Minimum operating temperature
Output polarity	COMPLEMENTARY
Package body material	PLASTIC/EPOXY
Package shape	RECTANGULAR
Package form	IN-LINE
Maximum supply current (ICC)	12 mA
propagation delay (tpd)	25 ns
Certification status	Not Qualified
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal form	THROUGH-HOLE
Terminal location	DUAL
Trigger type	HIGH LEVEL
Base Number Matches	1

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

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