C8051T600/1/2/3/4/5/6
Mixed-Signal Byte-Programmable EPROM MCU
Analog Peripherals
-
10-Bit ADC (‘T600/602/604 only)
•
•
•
•
•
High-Speed 8051 µC Core
-
Pipelined instruction architecture; executes 70% of
-
-
Memory
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256 or 128 Bytes internal data RAM
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8, 4, 2, or 1.5 kB byte-programmable EPROM code
memory
instructions in 1 or 2 system clocks
Up to 25 MIPS throughput with 25 MHz clock
Expanded interrupt handler
Up to 500 ksps
Up to 8 external inputs
V
REF
external pin, Internal Regulator or V
DD
Internal or external start of conversion source
Built-in temperature sensor
Programmable hysteresis and response time
Configurable as interrupt or reset source
Low current
-
Comparator
•
•
•
On-Chip Debug
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C8051F300 can be used as code development
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-
platform; complete development kit available
On-chip debug circuitry facilitates full speed,
non-intrusive in-system debug
Provides breakpoints, single stepping,
inspect/modify memory and registers
Digital Peripherals
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Up to 8 Port I/O with high sink current capability
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Hardware enhanced UART and SMBus™ serial
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-
ports
Three general purpose 16-bit counter/timers
16-bit programmable counter array (PCA) with three
capture/compare modules
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•
•
•
Supply Voltage 1.8 to 3.6 V
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On-chip LDO for internal core supply
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Built-in voltage supply monitor
Temperature Range: –40 to +85 °C
Package Options:
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3 x 3 mm QFN11
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2 x 2 mm QFN10 (C8051T606 Only)
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MSOP10 (C8051T606 Only)
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SOIC14 (C8051T600/1/2/3/4/5 Only)
8 or 16-bit PWM
Rising / falling edge capture
Frequency output
Software timer
Clock Sources
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Internal oscillator: 24.5 MHz with ±2% accuracy
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-
supports crystal-less UART operation
External oscillator: RC, C, or CMOS Clock
Can switch between clock sources on-the-fly; useful
in power saving modes
ANALOG
PERIPHERALS
A
M
U
X
DIGITAL I/O
UART
CROSSBAR
SMBus
PCA
Timer 0
Timer 1
Timer 2
+
-
C8051T600/2/4
VOLTAGE
COMPARATOR
CALIBRATED PRECISION INTERNAL
OSCILLATOR
HIGH-SPEED CONTROLLER CORE
1.5/2/4/8kB
EPROM
12
INTERRUPTS
8051 CPU
(25MIPS)
DEBUG
CIRCUITRY
128/256 B
SRAM
POR
WDT
Rev. 1.2 3/09
Copyright © 2009 by Silicon Laboratories
I/O Port
10-bit
500ksps
ADC
TEMP
SENSOR
C8051T600/1/2/3/4/5/6
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
C8051T600/1/2/3/4/5/6
Table of Contents
1. System Overview ..................................................................................................... 13
2. Ordering Information ............................................................................................... 16
3. Pin Definitions.......................................................................................................... 17
4. QFN-11 Package Specifications ............................................................................. 22
5. SOIC-14 Package Specifications ............................................................................ 24
6. MSOP-10 Package Specifications .......................................................................... 26
7. QFN-10 Package Specifications ............................................................................. 28
8. Electrical Characteristics ........................................................................................ 30
8.1. Absolute Maximum Specifications..................................................................... 30
8.2. Electrical Characteristics ................................................................................... 31
8.3. Typical Performance Curves ............................................................................. 38
9. 10-Bit ADC (ADC0, C8051T600/2/4 only)................................................................ 40
9.1. Output Code Formatting .................................................................................... 41
9.2. 8-Bit Mode ......................................................................................................... 41
9.3. Modes of Operation ........................................................................................... 41
9.3.1. Starting a Conversion................................................................................ 41
9.3.2. Tracking Modes......................................................................................... 42
9.3.3. Settling Time Requirements...................................................................... 43
9.4. Programmable Window Detector....................................................................... 47
9.4.1. Window Detector Example........................................................................ 49
9.5. ADC0 Analog Multiplexer (C8051T600/2/4 only)............................................... 50
10. Temperature Sensor (C8051T600/2/4 only) ......................................................... 52
10.1. Calibration ....................................................................................................... 52
11. Voltage Reference Options ................................................................................... 55
12. Voltage Regulator (REG0) ..................................................................................... 57
13. Comparator0........................................................................................................... 59
13.1. Comparator Multiplexer ................................................................................... 63
14. CIP-51 Microcontroller........................................................................................... 65
14.1. Instruction Set.................................................................................................. 66
14.1.1. Instruction and CPU Timing .................................................................... 66
14.2. CIP-51 Register Descriptions .......................................................................... 71
15. Memory Organization ............................................................................................ 74
15.1. Program Memory............................................................................................. 74
15.2. Data Memory ................................................................................................... 75
15.2.1. Internal RAM ........................................................................................... 75
15.2.1.1. General Purpose Registers ............................................................ 76
15.2.1.2. Bit Addressable Locations .............................................................. 76
15.2.1.3. Stack ............................................................................................ 76
16. Special Function Registers................................................................................... 77
17. Interrupts ................................................................................................................ 80
17.1. MCU Interrupt Sources and Vectors................................................................ 81
17.1.1. Interrupt Priorities.................................................................................... 81
17.1.2. Interrupt Latency ..................................................................................... 81
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C8051T600/1/2/3/4/5/6
17.2. Interrupt Register Descriptions ........................................................................ 82
17.3. INT0 and INT1 External Interrupt Sources ...................................................... 87
18. Power Management Modes................................................................................... 89
18.1. Idle Mode......................................................................................................... 89
18.2. Stop Mode ....................................................................................................... 90
19. Reset Sources ........................................................................................................ 92
19.1. Power-On Reset .............................................................................................. 93
19.2. Power-Fail Reset/VDD Monitor ....................................................................... 94
19.3. External Reset ................................................................................................. 94
19.4. Missing Clock Detector Reset ......................................................................... 94
19.5. Comparator0 Reset ......................................................................................... 94
19.6. PCA Watchdog Timer Reset ........................................................................... 94
19.7. EPROM Error Reset ........................................................................................ 95
19.8. Software Reset ................................................................................................ 95
20. EPROM Memory ..................................................................................................... 97
20.1. Programming and Reading the EPROM Memory ........................................... 97
20.1.1. EPROM Write Procedure ........................................................................ 97
20.1.2. EPROM Read Procedure........................................................................ 98
20.2. Security Options .............................................................................................. 98
20.3. Program Memory CRC .................................................................................... 99
20.3.1. Performing 32-bit CRCs on Full EPROM Content .................................. 99
20.3.2. Performing 16-bit CRCs on 256-Byte EPROM Blocks............................ 99
21. Oscillators and Clock Selection ......................................................................... 100
21.1. System Clock Selection................................................................................. 100
21.2. Programmable Internal High-Frequency (H-F) Oscillator .............................. 101
21.3. External Oscillator Drive Circuit..................................................................... 103
21.3.1. External RC Example............................................................................ 105
21.3.2. External Capacitor Example.................................................................. 105
22. Port Input/Output ................................................................................................. 106
22.1. Port I/O Modes of Operation.......................................................................... 107
22.1.1. Port Pins Configured for Analog I/O...................................................... 107
22.1.2. Port Pins Configured For Digital I/O...................................................... 107
22.1.3. Interfacing Port I/O to 5V Logic ............................................................. 108
22.2. Assigning Port I/O Pins to Analog and Digital Functions............................... 109
22.2.1. Assigning Port I/O Pins to Analog Functions ........................................ 109
22.2.2. Assigning Port I/O Pins to Digital Functions.......................................... 109
22.2.3. Assigning Port I/O Pins to External Digital Event Capture Functions ... 110
22.3. Priority Crossbar Decoder ............................................................................. 111
22.4. Port I/O Initialization ...................................................................................... 114
22.5. Special Function Registers for Accessing and Configuring Port I/O ............. 118
23. SMBus................................................................................................................... 120
23.1. Supporting Documents .................................................................................. 121
23.2. SMBus Configuration..................................................................................... 121
23.3. SMBus Operation .......................................................................................... 121
23.3.1. Transmitter Vs. Receiver....................................................................... 122
Rev. 1.2
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C8051T600/1/2/3/4/5/6
23.3.2. Arbitration.............................................................................................. 122
23.3.3. Clock Low Extension............................................................................. 122
23.3.4. SCL Low Timeout.................................................................................. 122
23.3.5. SCL High (SMBus Free) Timeout ......................................................... 123
23.4. Using the SMBus........................................................................................... 123
23.4.1. SMBus Configuration Register.............................................................. 123
23.4.2. SMB0CN Control Register .................................................................... 127
23.4.3. Data Register ........................................................................................ 130
23.5. SMBus Transfer Modes................................................................................. 131
23.5.1. Write Sequence (Master) ...................................................................... 131
23.5.2. Read Sequence (Master) ...................................................................... 132
23.5.3. Write Sequence (Slave) ........................................................................ 133
23.5.4. Read Sequence (Slave) ........................................................................ 134
23.6. SMBus Status Decoding................................................................................ 134
24. UART0 ................................................................................................................... 137
24.1. Enhanced Baud Rate Generation.................................................................. 138
24.2. Operational Modes ........................................................................................ 139
24.2.1. 8-Bit UART ............................................................................................ 139
24.2.2. 9-Bit UART ............................................................................................ 140
24.3. Multiprocessor Communications ................................................................... 141
25. Timers ................................................................................................................... 145
25.1. Timer 0 and Timer 1 ...................................................................................... 147
25.1.1. Mode 0: 13-bit Counter/Timer ............................................................... 147
25.1.2. Mode 1: 16-bit Counter/Timer ............................................................... 148
25.1.3. Mode 2: 8-bit Counter/Timer with Auto-Reload..................................... 149
25.1.4. Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)................................ 150
25.2. Timer 2 .......................................................................................................... 155
25.2.1. 16-bit Timer with Auto-Reload............................................................... 155
25.2.2. 8-bit Timers with Auto-Reload............................................................... 156
26. Programmable Counter Array............................................................................. 160
26.1. PCA Counter/Timer ....................................................................................... 161
26.2. PCA0 Interrupt Sources................................................................................. 162
26.3. Capture/Compare Modules ........................................................................... 163
26.3.1. Edge-triggered Capture Mode............................................................... 164
26.3.2. Software Timer (Compare) Mode.......................................................... 165
26.3.3. High-Speed Output Mode ..................................................................... 166
26.3.4. Frequency Output Mode ....................................................................... 167
26.3.5. 8-bit Pulse Width Modulator Mode ....................................................... 168
26.3.6. 16-Bit Pulse Width Modulator Mode..................................................... 169
26.4. Watchdog Timer Mode .................................................................................. 170
26.4.1. Watchdog Timer Operation ................................................................... 170
26.4.2. Watchdog Timer Usage ........................................................................ 171
26.5. Register Descriptions for PCA0..................................................................... 173
27. C2 Interface .......................................................................................................... 178
27.1. C2 Interface Registers................................................................................... 178
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C8051T600/1/2/3/4/5/6
27.2. C2 Pin Sharing .............................................................................................. 185
Document Change List.............................................................................................. 186
Contact Information................................................................................................... 188
Rev. 1.2
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