EPM240T100C5 datasheet, PDF - EEWORLD Datasheet

EPM240T100C5: Descriptioncpld - complex programmable logic devices cpld - max II 192 macro 80 ios; CategoryProgrammable logic devices Programmable logic; File Size3MB，297 Pages; ManufacturerAltera (Intel)

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cpld - complex programmable logic devices cpld - max II 192 macro 80 ios

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Altera (Intel)
Parts packaging code	QFP
package instruction	16 X 16 MM, 0.50 MM PITCH, TQFP-100
Contacts	100
Reach Compliance Code	not_compliant
ECCN code	EAR99
Samacsys Description	CPLD - Complex Programmable Logic Devices CPLD - MAX II 192 Macro 80 IOs
Other features	IT CAN ALSO OPERATE AT 3.3V
In-system programmable	YES
JESD-30 code	S-PQFP-G100
JESD-609 code	e0
JTAG BST	YES
length	14 mm
Humidity sensitivity level	3
Dedicated input times
Number of I/O lines	80
Number of macro cells	192
Number of terminals	100
Maximum operating temperature	85 °C
Minimum operating temperature
organize	0 DEDICATED INPUTS, 80 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	TFQFP
Encapsulate equivalent code	TQFP100,.63SQ
Package shape	SQUARE
Package form	FLATPACK, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	235
power supply	1.5/3.3,2.5/3.3 V
Programmable logic type	FLASH PLD
propagation delay	7.5 ns
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage	2.625 V
Minimum supply voltage	2.375 V
Nominal supply voltage	2.5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL EXTENDED
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	14 mm

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