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D5C121-55

Description
1200 GATE CHMOS H-SERIES ERASABLE PROGRAMMABLE LOGIC DEVICE
CategoryProgrammable logic devices    Programmable logic   
File Size1MB,15 Pages
ManufacturerIntel
Websitehttp://www.intel.com/
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D5C121-55 Overview

1200 GATE CHMOS H-SERIES ERASABLE PROGRAMMABLE LOGIC DEVICE

D5C121-55 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
package instructionDIP, DIP40,.6
Reach Compliance Codecompli
ArchitecturePAL-TYPE
JESD-30 codeR-XDIP-T40
JESD-609 codee0
Number of entries36
Output times24
Number of product terms236
Number of terminals40
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialCERAMIC
encapsulated codeDIP
Encapsulate equivalent codeDIP40,.6
Package shapeRECTANGULAR
Package formIN-LINE
Certification statusNot Qualified
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Base Number Matches1

D5C121-55 Related Products

D5C121-55 5C121 D5C121-65 D5C121-90
Description 1200 GATE CHMOS H-SERIES ERASABLE PROGRAMMABLE LOGIC DEVICE 1200 GATE CHMOS H-SERIES ERASABLE PROGRAMMABLE LOGIC DEVICE 1200 GATE CHMOS H-SERIES ERASABLE PROGRAMMABLE LOGIC DEVICE 1200 GATE CHMOS H-SERIES ERASABLE PROGRAMMABLE LOGIC DEVICE
Is it Rohs certified? incompatible - incompatible incompatible
package instruction DIP, DIP40,.6 - DIP, DIP40,.6 DIP, DIP40,.6
Reach Compliance Code compli - compli compli
Architecture PAL-TYPE - PAL-TYPE PAL-TYPE
JESD-30 code R-XDIP-T40 - R-XDIP-T40 R-XDIP-T40
JESD-609 code e0 - e0 e0
Number of entries 36 - 36 36
Output times 24 - 24 24
Number of product terms 236 - 236 236
Number of terminals 40 - 40 40
Maximum operating temperature 70 °C - 70 °C 70 °C
Package body material CERAMIC - CERAMIC CERAMIC
encapsulated code DIP - DIP DIP
Encapsulate equivalent code DIP40,.6 - DIP40,.6 DIP40,.6
Package shape RECTANGULAR - RECTANGULAR RECTANGULAR
Package form IN-LINE - IN-LINE IN-LINE
Certification status Not Qualified - Not Qualified Not Qualified
surface mount NO - NO NO
technology CMOS - CMOS CMOS
Temperature level COMMERCIAL - COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form THROUGH-HOLE - THROUGH-HOLE THROUGH-HOLE
Terminal pitch 2.54 mm - 2.54 mm 2.54 mm
Terminal location DUAL - DUAL DUAL
Base Number Matches 1 - 1 1

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