IRKK136-12HLN datasheet, PDF - EEWORLD Datasheet

IRKK136-12HLN: DescriptionSilicon Controlled Rectifier, 211.95A I(T)RMS, 1200V V(DRM), 1200V V(RRM), 1 Element; CategoryAnalog mixed-signal IC Trigger device; File Size60KB，1 Pages; ManufacturerInternational Rectifier （ Infineon ）; Websitehttp://www.irf.com/

Download Datasheet Parametric View All

IRKK136-12HLN Overview

Silicon Controlled Rectifier, 211.95A I(T)RMS, 1200V V(DRM), 1200V V(RRM), 1 Element

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	International Rectifier （ Infineon ）
package instruction	FLANGE MOUNT, R-PUFM-X5
Reach Compliance Code	compliant
Shell connection	ISOLATED
Nominal circuit commutation break time	15 µs
Configuration	SINGLE WITH BUILT-IN FREE-WHEELING DIODE
Critical rise rate of minimum off-state voltage	400 V/us
JESD-30 code	R-PUFM-X5
JESD-609 code	e0
Number of components	1
Number of terminals	5
Maximum operating temperature	125 °C
Package body material	PLASTIC/EPOXY
Package shape	RECTANGULAR
Package form	FLANGE MOUNT
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum rms on-state current	211.95 A
Off-state repetitive peak voltage	1200 V
Repeated peak reverse voltage	1200 V
surface mount	NO
Terminal surface	TIN LEAD
Terminal form	UNSPECIFIED
Terminal location	UPPER
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger device type	SCR
Base Number Matches	1

Microcontroller clocking - RC oscillator, crystal or tank?: Crystal oscillators, ceramic resonant tanks, RC oscillators, and silicon oscillators are four types of clock sources suitable for microcontrollers. Optimizing the clock source design for a specific ap...; fighting DSP and ARM Processors

FPGA back-engineering application example - checking code: [align=center][b][font=宋体][size=6]FPGA reverse deduction method application example - check code[/size][/font][/b][/align][align=left][font=宋体][size=5]For IT-related practitioners, reading other peopl...; njiggih FPGA/CPLD

Behavioral modeling sequential logic circuit (two-input AND gate) source code and test code: Source code:module and_gate1(clk, a, b, s);input clk;input a;input b;output reg s;//Behavioral modeling sequential logic circuit (two-input AND gate)always @ (posedge clk) //Rising edge triggeredbegin...; zxopenljx FPGA/CPLD

Hardware testing method for TI-CC chip: Brief description Forced to do something that is meaningless to the current direction, we can only grab some meaning from it.Based on TI's test software smartRF studio, the hardware needs to reserve V...; 火辣西米秀 Wireless Connectivity

Why does Unico prompt that STEVAL-MKI197V1 is not supported? --- Solved: [i=s]This post was last edited by a media student on 2020-4-12 22:31[/i]I got the board today and downloaded the unico software, but it prompted the following error:Please give me some pointers..Thank...; 传媒学子 ST MEMS Sensor Creative Design Competition

Design of automotive electronic control system unit based on ARM: With the widespread application of electronic control units (ECUs) in automobiles, the degree of automobile electrification is getting higher and higher. Although the increase of electronic control sy...; frozenviolet Automotive Electronics

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components