Metal Element
Current Sense Resistor
ULR Series
•
•
•
•
•
•
Robust metal strip able to withstand high temperature and high current.
Low TCR and Inductance
Resistance Range from 0.5 mΩ to 20 mΩ
Power ratings from 1W to 3W in 1206, 2010 and 2512 chip size
Designed for current sense circuits in power electronic systems
Higher wattage devices feature PCB clearance gap to maximize thermal
performance
Electrical Data
IRC Type
Coating
1
Power rating
at 80°C (Watts)
Standard Resistance
Values (mΩ)
2
TCR
Tolerance
Dielectric
(±ppm/°C)
(±%)
Withstanding Voltage
(Volts)
50
50
50
50
50
100
50
150
100
75
50
1, 5
200
1, 5
1, 5
100
100
1206 Chip Size
ULRG1
ULRG15
ULRG1
ULRG2
ULRG25
ULRG3
Green
Green
Green
1
1.5
1
2
2.5
3
1, 2, 3, 5, 7, 10
1, 2, 3, 5, 7, 10
11 - 20
7 - 10
4-6
0.5 - 0.75
1-3
2.5 - 3
ULRB1
ULRB2
Black
1
2
4-5
6-7
0.5 - 2
2010 Chip Size
2512 Chip Size
Notes:
1.Black coating = wave or IR reflow soldering; Green coating = IR reflow solder. Wave reflow - solder mask must match the W and D dimensions on page 2
of data sheet. 2Non-standard resistance values available (contact factory). For resistance values above 20 mΩ, please refer to our LRC / LRF series.
3 Package sizes 2010 and 1206 with the green coating are uncoated on the top surface and unmarked for resistance value.
Environmental Data
Test
Short Term Overload (5x rated power for 5 seconds)
Load at rated power (1000 hours cyclic load @ 70°C)
Temperatature Cycling (-55°C to +150°C; 1000 cycles)
Dry Heat (+170°C, no load; 1000 hours)
Resistance to Solder Heat (260°C for 10 seconds)
Solderability (235°C for 2 seconds)
Resistance to Solvents
Operating Temperature
General Note
IRC reserves the right to make changes in product specification without notice or liability.
All information is subject to IRC’s own data and is considered accurate at time of going to print.
Telephone: 361 992 7900 • Facsimile: 361 992 3377 • Website: www.irctt.com
∆R/R ≤
± 0.5% + 0.5 mΩ (black);
∆R/R ≤
± 1% (green)
∆R/R ≤
± 1% + 0.5 mΩ (black);
∆R/R ≤
± 1% (green)
∆R/R ≤
± 0.5% + 0.5 mΩ (black);
∆R/R ≤
± 1% (green)
∆R/R ≤
± 1% + 0.5 mΩ (black);
∆R/R ≤
± 1% (green)
∆R/R ≤
± 0.5% + 0.5 mΩ (black);
∆R/R ≤
± 1% (green)
Minimum 95% coverage
No deterioration of protective coating or marking
-55°C to 170°C
Wire and Film Technologies Division
• 4222 South Staples Street • Corpus Christi Texas 78411 USA
A Subsidiary of
TT electronics plc
ULR Issue Aug 2009 Sheet 1 of 6
Physical Data
D
T
W
L
Coating
Resistance
Value (mΩ)
(1 Watt)
1 - 10
L
W
T
D
1206 Chip Size
Green
3.2 ± 0.25
1.6 ± 0.10
0.6 ± 0.2
0.98 ± 0.38
2010 Chip Size
Green
(1.5 Watt)
1 - 10
5.08 ± 0.25
2.54 ± 0.15
0.6 ± 0.2
1.67 ± 0.63
2512 Chip Size
(1 Watt, 2 Watt, 2.5 Watt, and 3 Watt)
0.5
0.75
1
1.5
2.68 ± 0.25
2.48 ± 0.25
1.93 ± 0.25
1.43 ± 0.25
6.35 ± 0.25
3.18 ± 0.35
0.6 ± 0.2
1.18 ± 0.25
2.18 ± 0.25
1.93 ± 0.25
1.43 ± 0.25
1.18 ± 0.25
1.4 ± 0.2
1
1.0 ± 0.2
1
0.8 ± 0.2
1
0.65 ± 0.2
1
0.5 ± 0.2
1
6.35 ± 0.25
3.18 ± 0.25
1.0 ± 0.2
1
0.7 ± 0.2
1
0.6 ± 0.2
1
0.5 ± 0.2
1
0.45 ± 0.2
1
0.45 ± 0.2
1
1.43 ± 0.38
Green
2-3
4
5 - 6.5
7
7.5 - 20
0.5
0.75
1
1.5
2
Black
2.5
3
4
5-6
6.5
7
Note:
1
Dimensions are for reference only
Wire and Film Technologies Division
• 4222 South Staples Street • Corpus Christi Texas 78411 USA
Telephone: 361 992 7900 • Facsimile: 361 992 3377 • Website: www.irctt.com
ULR Issue Aug 2009 Sheet 2 of 6
Electrical Connections
4-wire pad layout
2512
2-wire pad layout
2512
4-wire measurement points
5.4
2512
a
1.2
1.0
L
unit: mm
4-wire pad layout
2010
unit: mm
a
L
3.45
1.5
0.5
Probe dia.
unit: mm
2010
4-wire measurement points
4.32
L
2-wire pad layout
2010
a
1.05
0.8
L
unit: mm
1206
a
2.9
1.2
0.5
Probe dia.
1206
unit: mm
4-wire pad layout
unit: mm
1206
4-wire measurement points
2-wire pad layout
a
0.7
0.5
unit: mm
L
unit: mm
a
L
1.9
1.25
unit: mm
2.6
0.5
Probe dia.
Package
2512 - Black
Resistance
(m-ohm)
All
0.5
0.75
1 - 1.5
2-3
4
5-6
7
8 - 20
a
1.85
2.78
2.58
2.03
1.28
2.28
2.03
1.53
1.28
L
2.9
0.9
1.3
2.4
3.9
1.9
2.4
3.4
3.9
Package
Resistance
(m-ohm)
1
2
3
4-5
6-8
9 - 10
1
2-3
a
2.04
1.74
1.24
2.04
1.74
1.49
1.3
0.8
1.3
1.1
0.8
L
1.2
1.8
2.8
1.2
1.8
2.3
0.8
1.8
0.8
1.2
1.8
2010 - Green
2512 - Green
1206 - Green
4-6
7-9
10
Note:
1
Green parts require the use of “D” dimensions on page 2 for parts being assembled in a wave reflow processes.
Wire and Film Technologies Division
• 4222 South Staples Street • Corpus Christi Texas 78411 USA
Telephone: 361 992 7900 • Facsimile: 361 992 3377 • Website: www.irctt.com
ULR Issue Aug 2009 Sheet 3 of 6
Construction
Black Type
A low TCR resistance alloy plate with plated connection
bands is protectively coated and numerically marked with
the resistance value, as described in Product Marking. This
version has standard plated connection and is suitable for
wave or IR reflow soldering processes.
Green Type
A low TCR alloy plate is grooved to set the
fi
nal resistance.
The lower faces are solder plated for connections, and the top
surface is protectively coated and numerically marked with the
resistance value, as described in Product Marking. This part
is suitable for wave and IR reflow soldering processes. Wave
reflow requires the solder mask to be dimensioned according to
page 2 using the W and D dimensions of the part.
Power Derating Curve
Note:
Rated Power (%)
100
50
0
0
85
170
The power derating curve is a guidance based on a
conservative design model. The ULR is a solid metal
alloy construction that can withstand significantly greater
operating temperatures than the conservative model per-
mits. The protective coating will operate up to 260°C and
the alloy can withstand in exess of 350°C. Therefore, the
system thermal design will be a more significant design
parameter due to the heat limitations of the solder joint.
Ambient Temperature (°C)
Plastic Tape Specification
Top Tape
ψD
A
B
0
E
F
W
T
Emboss Tape
Resistor
P
1
P
2
P
0
ψD
direction of unreeling
1
1.4Min.
Size
2512
2010
1206
Resistance
(mΩ)
0.5 - 7
0.5 - 20
1 - 10
A
3.4±0.1
2.85±0.1
B
6.73±0.1
6.75±0.1
5.55±0.1
W
12±0.1
12±0.1
E
1.75±0.1
1.75±0.1
1.75±0.1
F
5.5±0.05
5.5±0.05
3.5±0.05
P0
4±0.1
4±0.1
4±0.1
P1
4±0.1
4±0.1
4±0.1
P2
2±0.05
2±0.05
2±0.05
Φ
D0
1.5+0.1, -0
1.5+0.1, -0
1.55±0.05
1.55±0.05
T
0.81±0.1
0.80±0.1
0.85±0.1
0.87±0.1
1 - 10
1.9
±0.1
3.6
±0.1
8
±0.2
Note:
1.
2.
3.
4.
5.
The cumulative tolerance of 10 sprocket hole pitch is ± 0.2 mm.
Carrier camber shall not be more than 1 mm per 100 mm through a length of 250 mm.
A & B measured 0.3 mm from the bottom of the packet.
T measured at a point on the inside bottom of the packet to the top surface of the carrier.
Pocket position relative to sprocket hole is measured as the true position of the pocket and not the pocket hole.
ULR Issue Aug 2009 Sheet 4 of 6
• 4222 South Staples Street • Corpus Christi Texas 78411 USA
Telephone: 361 992 7900 • Facsimile: 361 992 3377 • Website: www.irctt.com
Wire and Film Technologies Division
IRC Solder Reflow Recommendations
Sn-Pb Eutectic and Pb-Free Reflow Profiles
t
P
T
P
Ramp-up
Critical Zone
T
L
to T
P
T
L
Temperature
T
smax
t
L
T
smin
t
s
Preheat
Ramp-down
25
t 25°C to Peak
Time
* Based on Industry Standards and IPC recommendations
Profile Feature
Average Ramp-up rate (Tsmax to Tp)
Preheat
- Temperature Min (Tsmin)
- Temperature Max (Tsmax)
- Time (Tsmin to Tsmax) (ts)
Time maintained above
- Temperature (TL)
- Time (tL)
Peak Temperature (TP)
Ramp-down Rate
Time 25°C to Peak Temperature
Time within 5°C of actual Peak Temperature (tp)2
Sn-Pb Eutectic
Assembly
3°C / second max.
100°C
150°C
60 -120 seconds
183°C
60 - 150 seconds
See Table 1
10 - 30 seconds
6°C / second max.
6 minutes max.
Pb-Free
Assembly
3°C / second max.
150°C
200°C
60 -180 seconds
217°C
60 - 150 seconds
See Table 2
20 - 40 seconds
6°C / second max.
8 minutes max.
Note 1:
All temperatures refer
to topside of the package,
measured on the package
body surface.
Note 2:
Time within 5 °C of
actual peak temperature (tp)
specified for the reflow profiles
is a “supplier” minimum and a
“user” maximum.
Tabel 1: SnPb Eutectic Process -
Package Peak Reflow Temperatures
Package
Thickness
< 2.5 mm
≥
2.5 mm
Volume mm3 < 350
240 +0/-5°C
225 +0/-5°C
Volume mm3
≥
350
225 +0/-5°C
225 +0/-5°C
Note 1:
Package volume excludes external
terminals (balls, bumps, lands, leads) and/or
non-integral heat sinks.
Note 2:
The maximum component temperature
reached during reflow depends on package
thickness and volume. The use of convection
reflow processess reduces the thermal gradients
between packages. However, thermal gradients
due to differences in thermal mass of SMD pack-
ages may still exist.
Note 3:
Components intended for use in “lead-
free” assembly process shall be evaluated using
the “lead-free” peak temperature and profiles
defined in Table 1, 2 and reflow profile whether
or not lead-free.
Tabel 2: Pb-free Process -
Package Peak Reflow Temperatures
Package
Thickness
< 1.6 mm
1.6 mm - 2.5 mm
≥
2.5 mm
Volume mm3
< 350
260°C *
260°C *
250°C *
Volume mm3
350 - 2000
260°C *
250°C *
245°C *
Volume mm3
> 2000
260°C *
245°C *
245°C *
* Tolerance: The device manufacturer/supplier shall assure process compat-
ibility up to and including the stated classification temperature at the rated MSL
level.
Wire and Film Technologies Division
• 4222 South Staples Street • Corpus Christi Texas 78411 USA
Telephone: 361 992 7900 • Facsimile: 361 992 3377 • Website: www.irctt.com
ULR Issue Aug 2009 Sheet 5 of 6
Integrated technical exchanges
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