EEWORLDEEWORLDEEWORLD

Part Number

Search

6560F124G251DXHTM

Description
Ceramic Capacitor, Multilayer, Ceramic, 250V, 2% +Tol, 2% -Tol, C0G, 30ppm/Cel TC, 0.12uF, Surface Mount, 6560, CHIP
CategoryPassive components    capacitor   
File Size112KB,2 Pages
ManufacturerKnowles
Websitehttp://www.knowles.com
Download Datasheet Parametric View All

6560F124G251DXHTM Overview

Ceramic Capacitor, Multilayer, Ceramic, 250V, 2% +Tol, 2% -Tol, C0G, 30ppm/Cel TC, 0.12uF, Surface Mount, 6560, CHIP

6560F124G251DXHTM Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Objectid1250796497
package instruction, 6560
Reach Compliance Codenot_compliant
Country Of OriginMainland China, USA
ECCN codeEAR99
YTEOL6.17
capacitance0.12 µF
Capacitor typeCERAMIC CAPACITOR
dielectric materialsCERAMIC
JESD-609 codee0
Installation featuresSURFACE MOUNT
multi-layerYes
negative tolerance2%
Number of terminals2
Maximum operating temperature160 °C
Minimum operating temperature-55 °C
Package shapeRECTANGULAR PACKAGE
method of packingTR
positive tolerance2%
Rated (DC) voltage (URdc)250 V
size code6560
surface mountYES
Temperature characteristic codeC0G
Temperature Coefficient30ppm/Cel ppm/°C
Terminal surfaceMatte Tin/Lead (Sn/Pb) - with Nickel (Ni) barrier
Terminal shapeWRAPAROUND
200ºC HIGH TEMPERATURE - COG
NOVACAP manufactures COG chip capacitors designed and tested to
operate from -55°C to 200°C. Product applications include
harsh environments such as oil exploration and automotive/avionics engine compartment circuitry. Product is available as surface
mount chips in sizes 0805 to 7565. Please refer to our Leaded encapsulated devices in sizes 1515 to 7565 for additional high
temperature capacitors. Consult Novacap if your specific requirements exceed our catalog maximums (size, cap. value, and voltage).
COG
CAPACITANCE & VOLTAGE SELECTION
3 digit code: two significant digits, followed by number of zeros eg: 473 = 47,000 pF
SIZE
Min Cap
0805
0R5
.054
272
182
681
471
181
470
1206
1R0
.064
562
392
182
102
391
101
270
0R5
1210
5R0
.065
123
822
332
222
821
221
560
1R0
1515
5R0
.130
223
183
103
392
272
821
181
1808
120
.065
123
822
332
222
102
221
560
1812
220
.065
223
153
822
562
222
561
121
560
220
270
1825
330
.080
563
393
153
123
392
821
181
2225
470
.080
563
473
183
183
562
102
271
3530
221
.250
104
823
563
333
123
562
152
561
680
331
4540
390
.300
184
154
104
563
273
153
332
152
221
821
6560
560
.300
334
274
224
124
563
333
822
332
182
7565
101
.300
394
334
274
154
683
393
103
392
102
222
Tmax
M A X C A P & V O LT A G E
25V
50V
100V
250V
500V
1000V
2000V
3000V
Min Cap
4000V
820
5R0
220
470
120
820
560
101
330
470
COG DIELECTRIC CHARACTERISTICS
Operating Temperature Range:
Temperature Coefficient up to 200ºC:
Dissipation Factor @ 25ºC:
Insulation Resistance at 25ºC:
at 200ºC:
Dielectric Withstanding Voltage:
*whichever is greater
Aging Rate:
Test Parameters:
-55ºC to 200ºC
0 +/- 30 ppm/ºC
.001 (0.1%) Max
>100GΩ or >1000ΩF
> 1GΩ or >10ΩF
< 200V, 250%
201-500V, 150% or 500V*
> 500V, 120% or 750V*
0% per decade
1KHz, 1.0 +/-0.2 VRMS, 25ºC
1MHz for Capacitance <100pf
%ΔC
40
20
0
-20
-40
10
-60
-80
-55 -25
0
25
50
75 100 125 150 175 200°C
0
25
50
75
100 125 150 175 200°C
0
1K
100
100K
1000
100K
TEMPERATURE COEFFICIENT
ΩF
MINIMUM IR VS. TEMPERATURE
“D”
ΩF
WHICHEVER IS LESS FOR ANY GIVEN CAPACITANCE
HOW TO ORDER
1812
SIZE
D
822
Value in
Picofarads
Two significant
figures,
followed by
number of
zeros:
822 = 8,200 pF
K
TOLERANCE
F = 1%
G = 2%
J = +/- 5 %
K = +/- 10 %
M = +/- 20 %
251
Two significant
figures followed
by number of
zeros:
251 = 250V
P
X
THICKNESS
OPTION
H
HIGH TEMP
SCREENING
Novacap High
Temp Screen
T
PACKING
OPTION
T=Reeled
M
MARKING
OPTION
M = Marked
(See Marking
Specification)
DIELECTRIC CAPACITANCE
VOLTAGE-VDCW TERMINATION
See Chart D = 200ºC
COG
F = up to
160ºC
COG
P= Palladium Silver
K= Solderable PdAg X=Non-stan-
F Dielectric Code
dard thickness.
Only
Specify in Mils
up to 160ºC
C=Polymer/Nickel
if non- standard
Barrier/100% Tin
is required.
D=Polymer/Nickel
Standard items
Barrier 90% Tin/10%
are any thick-
Lead
ness to Max.
N=Nickel Barrier
shown in
100% Tin
Y=Nickel Barrier 90%
charts.
Tin/10% Lead
NOTE: REFER TO PAGE 11 FOR DIMENSIONS
www .
N O V A C A P
.
com
www .
N O V A C A P
.
com
28
Catalog 09-08-PC
EEWORLD University ---- Live Replay: Keysight Oscilloscope Basic Training
Live replay: Keysight Oscilloscope Basic Training : https://training.eeworld.com.cn/course/6091...
hi5 Integrated technical exchanges
A qualified PCB engineer is one who can draw wires and understand PCB manufacturing.
In many PCB Layout engineer recruitment information, we can always see the phrase "familiar with PCB production and manufacturing process".PCB Layout EngineerJob requirements:1. Electronics and commun...
mwkjhl PCB Design
Sinlinx A33 Development Board Android Development (Part 1)
Sinlinx A33 Development Board Android Development (Part 1)...
ffqq123456 Mobile and portable
FPGA various digital circuit simulation
...
至芯科技FPGA大牛 FPGA/CPLD
[Qinheng RISC-V core CH582] CH582 USB HOST code interpretation
[i=s]This post was last edited by pomin on 2022-4-3 14:24[/i]CH582 USB HOST Code Interpretation The feature of CH582 MCU is Bluetooth, so I plan to make a small device that can convert a wired keyboar...
pomin Domestic Chip Exchange
RT-Thread System - Create a new project in Studio mode
For specific installation and use, please refer to the official website RT-Thread Studio Quick Reading Getting Started section Here is a little bit to say that after RT-Thread Studio is installed, you...
ID.LODA Embedded System

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号