EEWORLDEEWORLDEEWORLD

Part Number

Search
 PDF

GA532T2603XIAR

Description
Parallel - 3Rd Overtone Quartz Crystal, 26MHz Nom,
CategoryPassive components    Crystal/resonator   
File Size94KB,2 Pages
ManufacturerCTS
Environmental Compliance
Download Datasheet Parametric View All

GA532T2603XIAR Overview

Parallel - 3Rd Overtone Quartz Crystal, 26MHz Nom,

GA532T2603XIAR Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid2065810734
Reach Compliance Codecompliant
YTEOL7.05
Other featuresAT-CUT; AEC-Q200; TR, 7 INCH
Ageing5 PPM/YEAR
Crystal/Resonator TypePARALLEL - 3RD OVERTONE
Drive level10 µW
frequency stability0.0015%
frequency tolerance30 ppm
JESD-609 codee4
load capacitance10 pF
Installation featuresSURFACE MOUNT
Nominal operating frequency26 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
physical sizeL5.0XB3.2XH1.3 (mm)/L0.197XB0.126XH0.051 (inch)
Series resistance150 Ω
surface mountYES
Terminal surfaceGOLD OVER NICKEL
【Silicon Labs BG22-EK4108A Bluetooth Development Evaluation】+Connection Test Using Android APP
1. After setting up the development correctly, you can test whether the code can run correctly. A more convenient way is to download the EFR Connect Android app. After startup, enter the demo page, wi...
北方 Development Kits Review Area
How to encapsulate GPIO into nodes.
[color=#ff0000]A: How can I encapsulate a GPIO into a node of /sys/device/platform/rst. [/color] [color=#000000]B: Does it have to be in this directory /sys/device/platform/? Is there a way to only pu...
明远智睿Lan Industrial Control Electronics
[RVB2601 Creative Application Development] Simulating UART 3 to implement FIFO reception
The hardware serial port has a FIFO function, so the received data will be put into the buffer. Since the GPIO simulation has no buffer, I "copied" a FIFO work myself. fifi.c /**************FIFO Begin...
lugl4313820 XuanTie RISC-V Activity Zone
Please God save the child
Please help me, big guys. I beg you. 1. Based on the principle of the narrow pulse frequency discrimination circuit, design a practical frequency discrimination circuit, in which the monostable trigge...
无意lll Analog electronics
[AT-START-F403A Review] Part 2 F403 waveform output test and maximum frequency test
Clock waveform output test Like STM32 , the PA.8 pin of STM32 has the MCO function , which has a multiplexing function - clock output (MCO) , which can output the internal clock of STM32 through PA.8 ...
常见泽1 Domestic Chip Exchange
EEWORLD University ---- Xilinx Zynq FPGA Video Tutorial
Xilinx Zynq FPGA video tutorial : https://training.eeworld.com.cn/course/4634This tutorial explains FPGA basics, SOC introduction, DMA and VDMA, Linux, HLS image and PCIESuitable for the following app...
老白菜 FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号