Performance Characteristics
Parameter
Output Frequency ( ordering option )
Out 1, 5V option
Out 1, 3.3V option
Supply Voltage
1
+5
+3.3
Supply Current
Output Logic Levels
Output Logic High
2
Output Logic Low
2
Output Transition Times
Rise Time
2
Fall Time
2
Input Logic Levels
Output Logic High
2
Output Logic Low
2
Loss of Signal Indication
Output Logic High
2
Output Logic Low
2
Nominal Frequency on Loss of Signal
Output 1
Output 2
Symmetry or Duty Cycle
3
Out 1
Out 2
RCLK
Absolute Pull Range, ordering option
o
ver operating temp, aging, power supply
variations
Table 1. Electrical Performance
Symbol
Min
1.000
1.000
4.5
3.0
2.5
Typical
Maximum
65.636
51.840
Units
MHz
MHz
V
V
mA
V
V
ns
ns
V
V
V
V
ppm
ppm
%
%
%
ppm
V
V
rad/V
rad/V
qC
uA
V
DD
I
5.0
3.3
DD
5.5
3.6
65
0.5
5
5
V
OH
V
OL
t
R
t
F
V
IH
V
IL
V
OH
V
OL
2.0
2.5
0.5
0.5
r 75
r 75
SYM1
SYM2
RCLK
APR
V
V
40/60
45/55
40/60
r 50
r 80
r 100
0.5
0.3
Test Conditions for APR (+5V option)
Test Conditions for APR (+3.3V option)
Gain Transfer
Phase Detector Gain
+5V option
+3.3V Option
Operating temperature, ordering option
Control Voltage Leakage Current
C
C
Positive
0.53
0.35
0/70 or 40/85
4.5
3.0
I
1. A good quality 0.01uF in parrallel with a
0.1 uf capacitor s hould be located as close to pin 16 to ground as possible.
2. Figure 1 defines these par ameters. Figure 2 illustrates the equivalent
five-gate TTL load and operating conditions under w
tested and specified. Loads
greater than 15 pF will adversely effect rise/fall time and duty cycle.
3. Symmetry is defined as (O N TIME/PERIOD with Vs=-1.4 V for both 5V and 3.3V operation.
T
R
80
%
VCXO
r1
hich these parameters are
T
F
I
DD
+
-
16
.01 PF
I
C
V
C
+
-
1
3
15pF
650 :
1.4V
20
%
V
DD
.
1 PF
On Time
Period
1.8k
Figure 2. Output Waveform
Figure 3. OUT1, OUT2, RDATA and RCLK
Test Conditions (25 r 5C)
Test/Measurement
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